HT46R53/HT46R54
The lower byte of the PC (PCL) is a readable and
writeable register (06H). Moving data into the PCL per-
forms a short jump. The destination is within 256 loca-
tions.
When a control transfer takes place, an additional
dummy cycle is required.
Program Memory
-
EPROM
The program memory is used to store the program in-
structions which are to be executed. It also contains
data, table, and interrupt entries, and is organized into
2048´14 (HT46R53), or 4096´15 (HT46R54) bits, ad-
dressed by the Program Counter and table pointer.
Certain locations in the ROM are reserved for special
usage:
·
Location 000H
·
Location 004H
This location is reserved for the external interrupt ser-
vice program. If the INT input pin is activated, the in-
terrupt is enabled and the stack is not full, the program
begins execution at this location.
·
Location 008H
This location is reserved for the timer/event counter
interrupt service program. If a timer interrupt results
from a timer/event counter overflow, and the interrupt
is enabled and the stack is not full, the program begins
execution at location 008H.
·
Location 00CH
Location 00CH is reserved for the A/D converter inter-
rupt service program. If an A/D converter interrupt re-
sults from an end of A/D conversion, and if the
interrupt is enabled and the stack is not full, the pro-
gram begins execution at location 00CH.
·
Table location
This location is reserved for program initialization. Af-
ter a chip reset, the program always begins execution
at location 000H.
0 0 0 H
0 0 4 H
0 0 8 H
0 0 C H
0 1 0 H
0 1 4 H
0 1 8 H
P ro g ra m
M e m o ry
Any location in the program memory can be used as
look-up tables. The instructions
²TABRDC
[m]² (the
0 0 0 H
0 0 4 H
0 0 8 H
0 0 C H
0 1 0 H
0 1 4 H
0 1 8 H
P ro g ra m
M e m o ry
D e v ic e In itia liz a tio n P r o g r a m
E x te r n a l In te r r u p t S u b r o u tin e
T im e r /E v e n t C o u n te r In te r r u p t S u b r o u tin e
A /D C o n v e r te r In te r r u p t S u b r o u tin e
D e v ic e In itia liz a tio n P r o g r a m
E x te r n a l In te r r u p t S u b r o u tin e
T im e r /E v e n t C o u n te r In te r r u p t S u b r o u tin e
A /D C o n v e r te r In te r r u p t S u b r o u tin e
n 0 0 H
n F F H
L o o k - u p T a b le ( 2 5 6 w o r d s )
n 0 0 H
n F F H
L o o k - u p T a b le ( 2 5 6 w o r d s )
7 0 0 H
7 F F H
L o o k - u p T a b le ( 2 5 6 w o r d s )
1 4 b its
H T 4 6 R 5 3
F 0 0 H
F F F H
L o o k - u p T a b le ( 2 5 6 w o r d s )
1 5 b its
H T 4 6 R 5 4
N o te : n = 0 ~ 7
N o te : n = 0 ~ F
Program Memory
Table Location
b11
P11
1
b10
P10
1
b9
P9
1
b8
P8
1
b7
@7
@7
b6
@6
@6
b5
@5
@5
b4
@4
@4
b3
@3
@3
b2
@2
@2
b1
@1
@1
b0
@0
@0
Instruction
TABRDC [m]
TABRDL [m]
Table Location
Note:
b11~b0: Table location bits
P11~P8: Current program counter bits
@7~@0: Table pointer bits
For the HT46R53, since the program counter is 11 bits wide (b0~b10), the b11 columns in the table are not ap-
plicable
For the HT46R54, the TABRDC program counter is 12 bits wide. From b0~b11
Rev. 1.40
7
July 12, 2005
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
