HT48RA0-2/HT48CA0-2
V
3 .6 V
D D
V
L V R
L V R D e te c t V o lta g e
0 .9 V
0 V
R e s e t S ig n a l
R e s e t
*1
N o r m a l O p e r a tio n
*2
R e s e t
Low Voltage Reset
Note:
²*1²
To make sure that the system oscillator has stabilized, the SST provides an extra delay of 1024 system
clock pulses before entering the normal operation.
²*2²
Since low voltage has to be maintained in its original state and exceed 1ms, therefore 1ms delay enters
the reset mode.
Code Option
The following table shows eight kinds of code option in the HT48RA0-2/HT48CA0-2. All the code options must be de-
fined to ensure proper system functioning.
No.
1
2
3
Code Option
WDT time-out period selection
2
n
, where n=8~11.
Time-out period=
Clock Source
WDT enable/disable selection. This option is to decide whether the WDT timer is enabled or disabled.
CLR WDT times selection. This option defines how to clear the WDT by instruction.
²One
time² means that the
CLR WDT instruction can clear the WDT.
²Two
times² means only if both of the CLR WDT1 and CLR WDT2 in-
structions have been executed, the WDT can be cleared.
Wake-up selection. This option defines the wake-up activity function. External input pins (PB only) all have the
capability to wake-up the chip from a HALT.
Carrier/level output selection. This option defines the activity of PC0 to be carrier output or level output.
Carry frequency selection.
Clock Source
Carry frequency=
, where n=0~3.
(2 or 3)
´
2
n
Carrier duty selection. There are two types of selection: 1/2 duty or 1/3 duty.
7
If carrier frequency=Clock Source/(2, 4, 8 or 16), the duty cycle will be 1/2 duty.
If carrier frequency=Clock Source/3, the duty cycle will be 1/3 duty.
If carrier frequency=Clock Source/(6, 12 or 24), the duty cycle can be 1/2 duty or 1/3 duty.
8
9
System oscillator selection. RC or crystal oscillator.
LVR function: enable or disable
4
5
6
Rev. 1.50
11
July 23, 2004
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
