HT6116-70
CMOS 2K
×
8-Bit SRAM
Features
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•
•
•
•
Single 5V power supply
Low power consumption
–
Operating: 400mW (Typ.)
–
Standby: 5
µ
W (Typ.)
70ns (Max.) high speed access time
Power down by pin CS
TTL compatible interface levels
•
•
•
•
•
Fully static operation
Memory expansion by pin OE
Common I/O using tri-state outputs
Pin-compatible with standard 2K
×
8 bits of
EPROM/MASK ROM
24-pin DIP/SDIP/SOP package
General Description
The HT6116-70 is a 16384-bit static random
access memory. It is organized with 2048 words
of 8 bits in length, and operates with a single 5V
power supply. The IC is built with a high per-
formance CMOS 0.8
µ
m process in order to ob-
tain a low standby current and high reliability.
The IC contains six-transistor full CMOS mem-
ory cells and TTL compatible inputs and out-
puts, which are easily interface with common
system bus structures. The Data bus of the
HT6116-70 is designed as a tri-state type. The
IC is in the standby mode if the CS pin is set to
“high”.
Pin Assignment
Block Diagram
1
3rd July ’97