HI-3182, HI-3183, HI-3184, HI-3185, HI-3186, HI-3187, HI-3188
FUNCTIONAL DESCRIPTION
The SYNC and CLOCK inputs establish data synchronization
utilizing two AND gates, one for each data input. Each logic
input, including the power enable (STROBE) input, are
TTL/CMOS compatible.
The ARINC outputs can be put in a tri-state mode by applying
a logic high to the STROBE input pin. If this feature is not
being used, the pin should be tied to ground. The STROBE
function is not available in the 14 & 16-pin SOIC package
configurations where the pin is internally connected to
ground.
Figure 1 illustrates a typical ARINC 429 bus application.
Three power supplies are necessary to operate the HI-3182;
typically +15V, -15V and +5V. The chip also works with ±12V
supplies. The +5V supply can also provide a reference
voltage that determines the output voltage swing. The
differential output voltage swing will equal 2VREF. If a value of
VREF other than +5V is needed, a separate +5V power supply
is requ iredforpinV1 .
The ARINC outputs of the HI-3182, HI-3184 and HI-3187 are
protected by internal fuses capable of sinking between 800 -
900 mA forshortperiods oftime(125ms).
+5V
+15V
With the DATA (A) input at a logic high and DATA (B) input at a
logic low, AOUT will switch to the +VREF rail and BOUT will
switch to the -VREF rail (ARINC HIGH state). With both data
input signals at a logic low state, the outputs will both switch to
0V (ARINC NULLstate).
V
REF
OUT
V
1
SYNC
DATA (A)
CLOCK
+V
-V
INPUTS
TO ARINC BUS
B
The driver output impedance, ROUT, is nominally 75, 26 or 0
ohms depending onthe option chosen. The rise andfall times
of the outputs can be calibrated through the selection of two
external capacitor values that a re connected to the CA and C B
input pins. Typical values for high-speed operation
(100KBPS) are CA = CB = 75pF and for low-speed operati on
(12.5to 14KBPS)CA =CB =500pF.
STROBE
GND
DATA (B)
C
C
The CA and CB pins swing between +5V and ground allowing
the switching of capacitor values with an external single-
supply analog switch.
-15V
Figure 1. ARINC 429 BUS APPLICATION
Shorted on
HI-3186, HI-3187, HI-3188
+V
C
REF
A
DATA (A)
CLOCK
SYNC
LEVEL SHIFTER
AND SLOPE
CONTROL (A)
13 W
24.5 W
FA
OUTPUT
DRIVER (A)
C L
R L
LEVEL SHIFTER
AND SLOPE
24.5W
13 W
FB
DATA (B)
CONTROL (B)
OUTPUT
DRIVER (B)
CURRENT
REGULATOR
Shorted on
HI-3183, HI-3186
HI-3187, HI-3188
Shorted on
HI-3183, HI-3185
HI-3186, HI-3188
V1
STROBE
B
-V
GND
C
B
OUT
Figure 2. FUNCTIONAL BLOCK DIAGRAM
HOLT INTEGRATED CIRCUITS
2
HOLTIC [ HOLT INTEGRATED CIRCUITS ]
