HI-6010
GENERAL DESCRIPTION
The HI-6010 is a CMOS integrated circuit designed to
interface the avionics data bus standard ARINC 429 to an
8 bit port. It contains one receiver and one transmitter.
They operate independently except for the self test option
and the parity option. The receiver demands that the
incoming data meet the standard protocol and the
transmitter outputs a standard protocol stream.
The HI-6010 provides flexible options for interfacing to the
user system. The controlling processor can operate both
the receiver and transmitter either by using hard wired
flags and gates at the pins or by using software reads and
writes of the Status Register and Control Register or a
combination thereof.
The chip is programmable to operate with single 8 bit
bytes requiring "on the fly transmitter loading and receiver
downloading" or to operate in 32 bit "extended buffer"
mode. In addition there is an option to use automatic label
recognition after loading 8 possible labels for comparison.
Parity and self test are also software programmable.
Master Reset is activated only by taking theMRpinhigh.
Two clock inputs allow independent selection of the data
rates of the transmitter and receiver. Each must be 4X the
desired ARINC 429 frequency.
Error flags are generated for transmitter underwrites and
for receiver data framing miscues, parity errors, and buffer
overwrites.
The HI-6010 is a 5 volt chip that will require data transla-
tion from and to the ARINC bus. The HI-8482 and HI-8588
line receivers are available for the receiver side and the
HI-318X, HI-838X and HI-858X line drivers are available
for the transmitter side. The HI-8590 is also available with
a line driver and a line receiver in a single 16-pin thermally
enhanced ESOIC package.
FEATURES
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ARINC 429 protocol controller with interface to
an 8 bit bus
Automatic label recognition option
8 bit or 32 bit buffering option
Self test and parity options
CMOS / TTL logic pins
Plastic and ceramic package options - surface
mount or DIP
Military processing available
PIN CONFIGURATION
(Top View)
V
SS
WEF
CTS
TXC
HFS
MR
TXE
RXRDY
TXRDY
TXD0
TXD1
RXC
FCR
RXD0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
RE
C/D
CS
WE
D7
D6
D5
D4
D3
D2
D1
D0
RXD1
V
DD
Pin numbers apply for plastic and ceramic DIP and
for plastic PLCC. Consult factory for pin out of 48
lead ceramic leadless chip carrier.
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Avionics Data Communication
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Serial to Parallel Conversion
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Parallel to Serial Conversion
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VDD = 5.0 VOLTS ±5%
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VSS = 0.0 VOLTS
(DS6010 Rev. A)
HOLT INTEGRATED CIRCUITS
4-3
01/01