HI-8588-10
January 2001
ARINC 429 LINE RECEIVER
PIN CONFIGURATION
VCC
1
TESTA
2
RINB
3
RINA
4
DESCRIPTION
The HI-8588-10 ARINC 429 bus interface receiver is simi-
lar to the HI-8588 with the exception that it allows an exter-
nal 10 Kohm resistor in series with each ARINC input with-
out affecting the ARINC input thresholds. The product is
especially useful in applications where lightning protection
circuitry is also required. In addition, the test inputs force
both of the outputs to zero instead open circuit. The ana-
log/digital CMOS product requires only a 5 volt supply and
is available in a SO 8 pin package.
Each side of the ARINC bus must be connected through a
10 Kohm series resistor in order for the chip to detect the
correct ARINC levels. The typical 10 volt differential signal
is translated and input to a window comparator and latch.
The comparator levels are set so that with the external
10 Kohm resistors they are just below the standard 6.5 volt
minimum ARINC data threshold and just above the stan-
dard 2.5 voltmaximum ARINC null threshold.
The TESTA and TESTB inputs bypass the analog inputs
for testing purposes. Also if TESTA and TESTB are both
taken high, the digital outputs are forced to zero.
8
TESTB
7
ROUTB
6
ROUTA
5
GND
SUPPLY VOLTAGES
vcc
= 5.0V ± 5%
FUNCTION TABLE
FEATURES
PIN DESCRIPTION TABLE
PIN
SYMBOL
VCC
TESTA
RINB
RINA
GND
ROUTA
ROUTB
TESTB
FUNCTION
SUPPLY
LOGIC INPUT
ARINC INPUT
ARINC INPUT
POWER
LOGIC OUTPUT
LOGIC OUTPUT
LOGIC INPUT
CMOS
RECEIVER B INPUT
RECEIVER A INPUT
GROUND
RECEIVER CMOS OUTPUT A
RECEIVER CMOS OUTPUT B
CMOS
DESCRIPTION
5 VOLT SUPPLY
(DS8588-10 Rev. A)
HOLT INTEGRATED CIRCUITS
1
01/01
HOLTIC [ HOLT INTEGRATED CIRCUITS ]
