Electrical Specifications
Test conditions that are not specified can be anywhere within the recommended operating range.
All typical specifications are at T
A
=+25°C, V
DD1
= V
DD2
= +3.3 V.
Parameter
Quiescent Supply Current 1
HCPL-9000/-0900
HCPL-9030/-0930
HCPL-9031/-0931
HCPL-900J/-090J
HCPL-901J/-091J
HCPL-902J/-092J
Quiescent Supply Current 2
HCPL-9000/-0900
HCPL-9030/-0930
HCPL-9031/-0931
HCPL-900J/-090J
HCPL-901J/-091J
HCPL-902J/-092J
Logic Input Current
Logic High Output Voltage
Symbol
I
DD1
Min.
Typ.
0.008
0.008
1.5
0.016
3.3
1.5
Max.
0.01
0.01
2.0
0.02
4.0
2.0
Units Test Conditions
mA
V
IN
= 0V
I
DD2
3.3
3.3
1.5
5.5
3.3
3.0
I
IN
V
OH
-10
V
DD2
– 0.1
0.8 * V
DD2
V
DD2
V
DD2
– 0.5
0
0.5
0.1
0.8
4.0
4.0
2.0
8.0
4.0
6.0
10
mA
V
IN
= 0V
µA
V
V
V
V
I
OUT
= -20
µA,
V
IN
= V
IH
I
OUT
= -4 mA, V
IN
= V
IH
I
OUT
= 20
µA,
V
IN
= V
IL
I
OUT
= 4 mA, V
IN
= V
IL
Logic Low Output Voltage
V
OL
Switching Specifications
Maximum Data Rate
Clock Frequency
Propagation Delay Time to Logic
Low Output
Propagation Delay Time toLogic
High Output
Pulse Width
Pulse Width Distortion
[1]
|t
PHL
– t
PLH
|
Propagation Delay Skew
[2]
Output Rise Time (10 – 90%)
Output Fall Time (10 – 90%)
fmax
t
PHL
t
PLH
t
PW
|PWD|
t
PSK
t
R
t
F
10
2
4
2
2
3
3
3
3
2
15
18
3
6
4
4
5
5
5
5
3
12
12
100
110
50
18
18
MBd
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
kV/µs
V
cm
= 1000V
C
L
= 15 pF
Propagation Delay Enable to Output (Single Channel)
High to High Impedance
t
PHZ
Low to High Impedance
High Impedance to High
High Impedance to Low
Channel-to-Channel Skew
(Dual and Quad Channels)
Common Mode Transient Immunity
(Output Logic High or Logic Low)
[3]
t
PLZ
t
PZH
t
PZL
t
CSK
|CM
H
|
|CM
L
|
Notes:
1. PWD is defined as |t
PHL
-t
PLH
|. %PWD is equal to the PWD divided by the pulse width.
2. t
PSK
is equal to the magnitude of the worst case difference in t
PHL
and/or t
PLH
that will be seen between units at 25°C.
3. CM
H
is the maximum common mode voltage slew rate that can be sustained while maintaining V
OUT
> 0.8V
DD2
. CM
L
is the maximum common mode
input voltage that can be sustained while maintaining V
OUT
< 0.8V. The common mode voltage slew rates apply to both rising and falling common mode
voltage edges.
This product has been tested for electrostatic sensitivity to the limits stated in the specifications. However, Agilent recommends that all integrated circuits
be handled with appropriate care to avoid damage. Damage caused by inappropriate handling or storage could range from performance degradation to
complete failure.
8
HP [ AGILENT(HEWLETT-PACKARD) ]
