H
40 ns Prop. Delay,
SO-8 Optocoupler
Technical Data
HCPL-0710
Features
• +5 V CMOS Compatibility
• 8 ns max. Pulse Width
Distortion
• 20 ns max. Prop. Delay Skew
• High Speed: 12 Mbd
• 40 ns max. Prop. Delay
• 10 kV/
µ
s Minimum Common
Mode Rejection
• 0
°
C to 85
°
C Temp. Range
• Safety and Regulatory
Approvals
UL Recognized
2500 V rms for 1 min. per
UL 1577
CSA Component Acceptance
Notice #5
Description
Available in the SO-8 package
style, the HCPL-0710 optocoupler
utilizes the latest CMOS IC
technology to achieve outstanding
performance with very low power
consumption. The HCPL-0710
requires only two bypass
capacitors for complete CMOS
compatability.
Basic building blocks of the
HCPL-0710 are a CMOS LED
driver IC, a high speed LED and a
CMOS detector IC. A CMOS logic
input signal controls the LED
driver IC which supplies current
to the LED. The detector IC
incorporates an integrated
photodiode, a high-speed
transimpedance amplifier, and a
voltage comparator with an
output driver.
Functional Diagram
**V
DD1
1
8
V
DD2
**
Applications
• Digital Fieldbus Isolation:
DeviceNet, SDS, Profibus
• AC Plasma Display Panel
Level Shifting
• Multiplexed Data
Transmission
• Computer Peripheral
Interface
• Microprocessor System
Interface
V
I
2
I
O
7
NC*
*
3
LED1
6
V
O
GND
1
4
SHIELD
5
GND
2
TRUTH TABLE
(POSITIVE LOGIC)
V
I
, INPUT
H
L
LED1
OFF
ON
V
O
, OUTPUT
H
L
*Pin 3 is the anode of the internal LED and must be left unconnected for guaranteed data sheet performance.
Pin 7 is not connected internally. External connections to pin 7 are not recommended.
**A 0.1
µF
bypass capacitor must be connected between pins 1 and 4, and 5 and 8.
CAUTION:
It is advised that normal static precautions be taken in handling and assembly of this component
to prevent damage and/or degradation which may be induced by ESD.
HP [ AGILENT(HEWLETT-PACKARD) ]
