power budget to do this. This is
primarily caused by a change of
receiver sensitivity.
These transceivers can also be
used for applications which
require different Bit Error Rate
(BER) performance. Figure 5
illustrates the typical trade-off
between link BER and the
receivers input optical power
level.
Transceiver Jitter
Performance
The Hewlett-Packard 1300 nm
transceivers are designed to
operate per the system jitter
allocations stated in FC-PH
Annex A.4.3 and A.4.4.
may be induced by electrostatic
discharge (ESD). These trans-
ceivers are certified as MIL-STD-
883C Method 3015.4 Class 2
devices.
Care should be used to avoid
shorting the receiver data or
signal detect outputs directly to
ground.
Solder and Wash Process
Compatibility
The transceivers are delivered
with a protective process plug
inserted into the duplex SC
connector receptacle. This
process plug protects the optical
subassemblies during wave solder
and aqueous wash processing and
acts as a dust cover during
shipping.
These transceivers are compat-
ible with industry standard wave
and hand solder processes.
Shipping Container
The transceiver is packaged in a
shipping container designed to
protect it from mechanical and
ESD damage during shipment or
storage.
Board Layout – Decoupling
Circuit and Ground Planes
You should take care in the layout
of your circuit board to achieve
optimum performance from these
transceivers. Figure 6 provides a
good example of a schematic for
a power supply decoupling circuit
that works well with these parts.
Hewlett-Packard further recom-
mends that a contiguous ground
The HP 1300 nm transmitters will
tolerate the worst case input
electrical jitter allowed, without
violating the worst case output
optical jitter requirements.
The HP 1300 nm receivers will
tolerate the worst case input
optical jitter allowed without
violating the worst case output
electrical jitter allowed.
The jitter specifications stated in
the following tables are derived
from the values in FC-PH Annex
A.4.3 and A.4.4. They represent
the worst case jitter contribution
that the transceivers are allowed
to make to the overall system
jitter without violating the
allowed allocation. In practice,
the typical contribution of the HP
transceivers is below these
maximum allowed amounts.
Recommended Handling
Precautions
Hewlett-Packard recommends
that normal static precautions be
taken in handling and assembly
of these transceivers to prevent
damage and/or degradation which
218
, ,
,
,,
,
NO INTERNAL CONNECTION
NO INTERNAL CONNECTION
HFBR-530X
TOP VIEW
Rx
V
EE
1
RD
2
RD
3
SD
4
Rx
V
CC
5
Tx
V
CC
6
TD
7
TD
8
Tx
V
EE
9
C1
C2
TERMINATION
AT PHY
DEVICE
INPUTS
L1
L2
V
CC
R2
R3
V
CC
C3
C4
R1
R4
R5
R7
V
CC
FILTER
AT V
CC
PINS
TRANSCEIVER
C5
C6
R6
R8
R9
R10
TERMINATION
AT TRANSCEIVER
INPUTS
RD
RD
SD
V
CC
TD
TD
NOTES:
THE SPLIT-LOAD TERMINATIONS FOR ECL SIGNALS NEED TO BE LOCATED AT THE INPUT
OF DEVICES RECEIVING THOSE ECL SIGNALS. RECOMMEND 4-LAYER PRINTED CIRCUIT
BOARD WITH 50 OHM MICROSTRIP SIGNAL PATHS BE USED.
R1 = R4 = R6 = R8 = R10 = 130 ohms.
R2 = R3 = R5 = R7 = R9 = 82 ohms.
C1 = C2 = C3 = C5 = C6 = 0.1 µF.
C4 = 10 µF.
L1 = L2 = 1 µH COIL OR FERRITE INDUCTOR.
Figure 6. Recommended Decoupling and Termination Circuits.
HP [ AGILENT(HEWLETT-PACKARD) ]
