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HFBR-5805A 参数 Datasheet PDF下载

HFBR-5805A图片预览
型号: HFBR-5805A
PDF下载: 下载PDF文件 查看货源
内容描述: HFBR - 5805 / 5805T / 5805A / 5805AT ATM收发器用于SONET OC - 3 / SDH STM - 1的低成本1 ×9封装形式 [HFBR-5805/5805T/5805A/5805AT ATM Transceivers for SONET OC-3/SDH STM-1 in Low Cost 1 x 9 Package Style]
分类和应用: 异步传输模式ATM
文件页数/大小: 14 页 / 247 K
品牌: HP [ AGILENT(HEWLETT-PACKARD) ]
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HFBR-5805/5805T/5805A/5805AT ATM
Transceivers for SONET OC-3/SDH
STM-1 in Low Cost 1 x 9 Package Style
Data Sheet
Features
• Full compliance with ATM forum
UNI SONET OC-3 multimode fiber
physical layer specification
• Multisourced 1 x 9 package style
with choice of duplex SC or
duplex ST* receptacle
• Wave solder and aqueous wash
process compatibility
• Manufactured in an ISO 9002
certified facility
• Single +3.3 V or +5.0 V power
supply
Applications
• Multimode fiber ATM backbone
links
• Multimode fiber ATM wiring
closet to desktop links
Ordering Information
The HFBR-5805/5805T/5805A/
5805AT 1300 nm products are
available for production orders
through the Agilent Component
Field Sales Offices and
Authorized Distributors world
wide.
0 °C to +70 °C
HFBR-5805/5805T
-10 °C to +85 °C
HFBR-5805A/5805AT
*ST is a registered trademark of AT&T
Lightguide Cable Connectors.
Note:
The “T” in the product numbers
indicates a transceiver with a duplex ST
connector receptacle.
Product numbers without a “T” indicate
transceivers with a duplex SC connector
receptacle.
Description
The HFBR-5800 family of
transceivers from Agilent
provide the system designer
with products to implement a
range of solutions for
multimode fiber SONET OC-3
(SDH STM-1) physical layers
for ATM and other services.
The transceivers are all
supplied in the industry
standard 1 x 9 SIP package
style with either a duplex SC
or a duplex ST* connector
interface.
ATM 2 km Backbone Links
The HFBR-5805/-5805T are
1300 nm products with optical
performance compliant with
the SONET STS-3c (OC-3)
Physical Layer Interface
Specification. This physical
layer is defined in the ATM
Forum User-Network Interface
(UNI) Specification Version 3.0.
This document references the
ANSI T1E1.2 specification for
the details of the interface for
2 km multimode fiber
backbone links.
The ATM 100 Mb/s-125 MBd
Physical Layer interface is best
implemented with the HFBR-
5803 family of Fast Ethernet
and FDDI Transceivers which
are specified for use in this
4B/5B encoded physical layer
per the FDDI PMD standard.
Transmitter Sections
The transmitter section of the
HFBR-5803 and HFBR-5805
series utilize 1300 nm InGaAsP
LEDs. These LEDs are
packaged in the optical
subassembly portion of the
transmitter section. They are
driven by a custom silicon IC
which converts differential
PECL logic signals, ECL
referenced (shifted) to a +3.3 V
or +5.0 V supply, into an
analog LED drive current.
Receiver Sections
The receiver section of the
HFBR-5803 and HFBR-5805
series utilize InGaAs PIN
photodiodes coupled to a
custom silicon transimpedance
preamplifier IC. These are
packaged in the optical
subassembly portion of the
receiver.
These PIN/preamplifier
combinations are coupled to a
custom quantizer IC which
provides the final pulse
shaping for the logic output
and the Signal Detect function.
The data output is dif-
ferential. The signal detect
output is single-ended. Both
data and signal detect outputs
are PECL compatible, ECL
referenced (shifted) to a 3.3 V
or +5.0 V power supply.