GL6965
Pin Descriptions
Pin No.
Symbol
Function
Explanation
1
VL
Line Current flow-in and
Line Voltage terminal
2
TOI
Current flow-in terminal
of transmit output
3
TOO
Current output terminal
of transmit output
4
AC
Bias
AC signal reference
Voltage terminal
5
MFI
Input terminal of DTMF
or external input signal
6
7
8
TPO
TPI1
TPI2
Output terminal of
transmit input Amp.
Inversion input terminal
of transmit input Amp.
Non-inversion
input
terminal of transmit input
Amp.
Connected to positive output of diode bridge circuit. DC
potential of this terminal determines line voltage and if AC
signal is not input, the highest DC potential appears.
Transmit output signal and output signal of opposite transfer
side are intermingled and output at this terminal in actual use.
Connected to VL terminal ( 1 pin) through 43
Ω
. Since
almost all the line currents flow in from this terminal, set
allowable power of resistance 43
Ω
to be connected to VL
terminal from this terminal considering the maximum line
cur-rent expected to be used.
Connected to GND terminal (10 pin) through 15
Ω
. Since
almost all the line currents flow out from this terminal, set
allowable power of resistance 15
Ω
to be connected to GND
terminal from this terminal considering the maximum line
cur-rent expected to be used.
Transmit signal is sent from this terminal. Signal of this ter-
minal varies current which is input from line through con-
nected resistance 15
Ω
, and makes it be output at VL
terminal ( 1 pin)
When AC signal is input to this terminal through capacitor
(for blocking DC), signal is sent to line, Input from this ter-
minal is output to line without any relation to gain control
(PAD) or MUTE since this input does not pass through gain
control circuit or MUTE function
Signal which is input to this terminal is output at VL terminal
( 1 pin) only when MUTE terminal ( 9 pin) is in “L” state.
Since this terminal is biased to almost the same potential as
REF terminal ( 13 pin), avoid direct impressing external
DC potential by using capacitor at inputting external terminal.
Makes negative feedback to TPI1 terminal (7 pin)
Receives negative feedback from TPO terminal (6
pin)
Applies DC bias to this terminal from REF terminal13 pin)
(
through resistance
4
HYNIX [ HYNIX SEMICONDUCTOR ]
