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GM71VS17403CLJ-6 参数 Datasheet PDF下载

GM71VS17403CLJ-6图片预览
型号: GM71VS17403CLJ-6
PDF下载: 下载PDF文件 查看货源
内容描述: X4 EDO页模式DRAM\n [x4 EDO Page Mode DRAM ]
分类和应用: 动态存储器
文件页数/大小: 10 页 / 101 K
品牌: HYNIX [ HYNIX SEMICONDUCTOR ]
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GM71V17403C
GM71VS17403CL
DC Electrical Characteristics
(V
CC
= 3.3V+/-0.3V, V
SS
= 0V, T
A
= 0 ~ 70C)
Symbol
V
OH
V
OL
I
CC1
Parameter
Output Level
Output "H" Level Voltage (I
OUT
= -2mA
)
Output Level
Output "L" Level Voltage (I
OUT
=
2
mA)
Operating Current
Average Power Supply Operating Current
(RAS, CAS Cycling
:
t
RC
=
t
RC
min)
Standby Current (TTL)
Power Supply Standby Current
(RAS, CAS = V
IH
,
D
OUT
=
High-Z)
RAS Only Refresh Current
Average Power Supply Current
RAS Only Refresh Mode
(t
RC
= t
RC
min)
EDO Page Mode Current
Average Power Supply Current
EDO Page Mode
(t
HPC
= t
HPC
min)
Standby Current (CMOS)
Power Supply Standby Current
(RAS, CAS >= V
CC
- 0.2V, D
OUT
= High-Z)
CAS-before-RAS Refresh Current
(t
RC
= t
RC
min)
50ns
60ns
70ns
50ns
60ns
70ns
50ns
60ns
70ns
50ns
60ns
70ns
Min
2.4
0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Max
V
CC
0.4
100
90
80
2
100
90
80
90
80
75
1
100
100
90
80
300
Unit
V
V
Note
mA
1, 2
I
CC2
mA
I
CC3
mA
2
I
CC4
mA
1, 3
I
CC5
mA
uA
mA
5
I
CC6
I
CC7
Battery Backup Operating Current(Standby with CBR Refresh)
(CBR refresh, t
RC
= 31.3us
,
t
RAS
<=
0.3
us,
D
OUT
=
High-Z, CMOS interface)
Standby Current RAS = V
IH
CAS = V
IL
D
OUT
=
Enable
Self-Refresh Mode Current
(RAS, CAS<=0.2V
,
D
OUT
=
High-Z, CMOS interface)
Input Leakage Current
Any Input (0V
<=
V
IN
<=
4.6V)
Output Leakage Current
(D
OUT
is Disabled, 0V
<=
V
OUT
<= 4.
6V)
uA
4,5
I
CC8
-
-
-10
-10
5
200
10
10
mA
uA
uA
uA
1
I
CC9
I
L(I)
I
L(O)
5
Note: 1. I
CC
depends on output load condition when the device is selected.
I
CC
(max) is specified at the output open condition.
2. Address can be changed once or less while RAS = V
IL
.
3. Address can be changed once or less while CAS = V
IH
.
4. CAS = L (<=0.2) while RAS = L (<=0.2).
5. L - Version.
Rev 0.1 / Apr’01