GMS81C2112/GMS81C2120
17.1 Operating Mode
f
XI
: Main clock frequency
f
SYS
: f
XI
,f
XI
÷4,f
XI
÷8,f
XI
÷32
cpu : system clock
tmr : timer0 clock
peri : peripheral clock
CKCTLR = CKCTLR[6:5]
STANDBY Mode
f
XI
: oscillation
cpu : stop
tmr : ps11(f
XI
)
peri : stop
CKCTLR[10]
+
STOP
ACTIVE Mode
f
XI
: oscillation
cpu : f
SYS
tmr : f
SYS
peri : f
SYS
TIMER0
EXT_INT
RESET
RC_WDT
CKCTLR[00]
+
STOP
EXT_INT
RESET
RC_WDT
STOP Mode
f
XI
: stop
cpu : stop
tmr : stop
peri : stop
System Clock Mode Register
SCMR
-
-
-
CS1
CS0
-
-
-
ADDRESS : FAH
RESET VALUE : ---00---
CS[1:0]
Clock selection enable bits
00 : f
XI
10 : f
XI
÷
8
01 : f
XI
÷
4
11 : f
XI
÷
32
JUNE. 2001 Ver 1.00
73