H5PS1G43EFR
H5PS1G83EFR
H5PS1G63EFR
1.2 Pin Configuration & Address Table
256Mx4 DDR2 Pin Configuration(Top view: see balls through package)
7
8
3
9
1
2
VSSQ
DQS
VSS
VDDQ
VDD
NC
NC
A
B
C
DQS
VDDQ
DQ2
VSSQ
DQ0
VSSQ
CK
DM
VDDQ
DQ3
VSS
NC
VDDQ
NC
VSSQ
DQ1
VDDQ
NC
VSSQ
VREF
CKE
D
E
VSSDL
RAS
VDD
ODT
VDDL
F
G
H
J
CK
WE
CAS
A2
CS
A0
BA1
A1
BA2
VSS
VDD
BA0
A10
A3
VDD
VSS
A6
A4
A5
K
A11
NC
A8
A9
A7
L
A13
NC
A12
ROW AND COLUMN ADDRESS TABLE
ITEMS
256Mx4
# of Bank
Bank Address
Auto Precharge Flag
Row Address
8
BA0,BA1,BA2
A10/AP
A0 - A13
A0-A9, A11
1 KB
Column Address
Page size
Rev. 0.4 / Nov 2008
5
HYNIX [ HYNIX SEMICONDUCTOR ]
