HL15604
ii )SCK is stopped at the high level
CE
SCK
SI
SO
CE
SCK
SI
SO
CE
SCK
SI
SO
CE
SCK
SI
SO
A7~A0 : 42H address
D164~D1 : Data of LCD display registers
S0, S1 : Sleep control data
K0, K1 : Key scan output / Segment output selection data
P0, P1 : Segment output / general-purpose output port selection data
SC
: Segment on / off control data
DR
: 1/2 bias or 1/3 bias drive selection data
XX
0
A0
1
A1
0
A2
0
A3
0
A4
0
A5
1
A6
0
A7
D125 D126
D163 D164
XX
0
A0
1
A1
0
A2
0
A3
0
A4
0
A5
1
A6
0
A7
D1
D2
D3
D41 D42 D43 D44
Display data
0
0
S0
S1
K0
K1
P0
P1
SC DR
0
DD
0
Control data
XX
0
A0
1
A1
0
A2
0
A3
0
A4
0
A5
1
A6
0
A7
D45 D46
D83 D84
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DD
1
Display data
Fixed data
XX
0
A0
1
A1
0
A2
0
A3
0
A4
0
A5
1
A6
0
A7
D85 D86
D123 D124
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
DD
0
Display data
Fixed data
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
DD
1
Display data
Fixed data
8
HYNIX [ HYNIX SEMICONDUCTOR ]
