HY27SS(08/16)121M Series
HY27US(08/16)121M Series
512Mbit (64Mx8bit / 32Mx16bit) NAND Flash
Document Title
512Mbit (64Mx8bit / 32Mx16bit) NAND Flash Memory
Revision History
No.
0.0
0.1
0.2
0.3
Initial Draft
Renewal Product Group
Make a decision of PKG information
Append 1.8V Operation Product to Data sheet
1) Add Errata
tWC
Specification
0.4
Relaxed value
50
60
tWH
15
20
tWP
25
40
tRC
50
60
tREH
15
20
tRP
30
40
tREA@ID Read
35
45
Mar.28.2004
Preliminary
History
Draft Date
Sep.17.2003
Oct.07.2003
Nov.08.2003
Dec.01.2003
Remark
Preliminary
Preliminary
Preliminary
Preliminary
2) Modify the description of Device Operations
- /CE Don’t Care Enabled(Disabled) -> Sequential Row Read Disabled
(Enabled) (Page22)
3) Add the description of System Interface Using CE don’t care
(Page37)
1) Delete Errata
2) Change Characteristics (3V Product)
0.5
tCRY
Before
After
60 + tr
70 + tr
tREA@ID Read
35
45
Jun. 01. 2004
Preliminary
3) Delete Cache Program
0.6
1) Change TSOP1, WSOP1, FBGA package dimension
2) Edit TSOP1, WSOP1 package figures
3) Change FBGA package figure
Oct. 20. 2004
This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for
use of circuits described. No patent licenses are implied.
Rev 0.6 / Oct. 2004
1
HYNIX [ HYNIX SEMICONDUCTOR ]
