DATA PROTECTION
The HY29F040A is designed to offer protection
against accidental erasure or programming
caused by spurious system level signals that may
exist during power transitions. During power-up the
device automatically resets the internal state ma-
chine in the Read mode. Also, with its control reg-
ister architecture, alteration of the memory con-
tents only occurs after successful completion of spe-
cific multi-bus cycle command sequences. The
device also incorporates several features to pre-
vent inadvertent write cycles resulting from Vcc
power-up and power-down transitions or
system noise.
Power-Up Write Inhibit
Power-up of the device with /WE = /CE = V
IL
and
/OE = V
IH
will not accept commands on the rising
edge of /WE. The internal state machine is
automatically reset to Read mode on power-up.
Sector Protection
Sectors of the HY29F040A may be hardware
protected at the users factory. The protection
circuitry will disable both program and erase
functions for the protected sectors. Requests to
program or erase a protected sector will be
ignored by the device. Sector protection is
accomplished in a PROM programmer.
The HY29F040A features hardware sector protec-
tion that will disable both program and erase
operations to an individual sector or any group of
sectors. To activate this mode, programming
equipment must force V
ID
on control pin /OE and
address pin A9. Sector addresses should be set
using higher address lines A18, A17 and A16. The
protection mechanism begins on the falling edge
of the /WE pulse and is terminated with the rising
edge of /WE. See Figures 13 and 14 for details of
implementing Sector Protect.
Low Vcc Write Inhibit
To avoid initiation of a write cycle during Vcc power-
up and power-down, a write cycle is locked out for
Vcc less than 3.2V (typically 3.7V). If Vcc < V
LKO
,
the command register is disabled and all internal
programming/erase circuits are disabled. Under
this condition the device will reset to the Read
mode. Subsequent writes will be ignored until the
Vcc level is greater than V
LKO
. It is the users re-
sponsibility to ensure that the control pins are logi-
cally correct to prevent unintentional writes when
Vcc is above 3.2V.
Write Pulse “Glitch” Protection
Noise pulses of less than 5 ns (typical) on /OE,
/CE or /WE will not initiate a write cycle.
Sector Unprotect
The HY29F040A also features a sector unprotect
mode, so that a protected sector may be unpro-
tected to incorporate any changes in the code.
Protecting all sectors is necessary before
unprotecting any sector(s). Sector unprotection is
accomplished in a PROM programmer. See Fig-
ures 15 and 16 for details of implementing Sector
Unprotect.
Logical Inhibit
Writing is inhibited by holding any one of
/OE = V
IL
, /CE = V
IH
, or /WE = V
IH
. To initiate a
write cycle /CE and /WE must be a logical “0” while
/OE is a logical “1”.
HY29F040A
13
HYNIX [ HYNIX SEMICONDUCTOR ]
