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HY29F400TT-70 参数 Datasheet PDF下载

HY29F400TT-70图片预览
型号: HY29F400TT-70
PDF下载: 下载PDF文件 查看货源
内容描述: X8 / X16闪存EEPROM [x8/x16 Flash EEPROM ]
分类和应用: 闪存可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件页数/大小: 40 页 / 508 K
品牌: HYNIX [ HYNIX SEMICONDUCTOR ]
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HY29F400
4 Megabit (512Kx8/256Kx16) 5 Volt-only Flash Memory
KEY FEATURES
n
5 Volt Read, Program, and Erase
– Minimizes system-level power requirements
n
High Performance
– Access times as fast as 45 ns
n
Low Power Consumption
– 20 mA typical active read current in byte
mode, 28 mA typical in word mode
– 30 mA typical program/erase current
– 5 µA maximum CMOS standby current
n
Compatible with JEDEC Standards
– Package, pinout and command-set
compatible with the single-supply Flash
device standard
– Provides superior inadvertent write
protection
n
Sector Erase Architecture
– Boot sector architecture with top and
bottom boot block options available
– One 16 Kbyte, two 8 Kbyte, one 32 Kbyte
and seven 64 Kbyte sectors in byte mode
– One 8 Kword, two 4 Kword, one 16 Kword
and seven 32 Kword sectors in word mode
– A command can erase any combination of
sectors
– Supports full chip erase
n
Erase Suspend/Resume
– Temporarily suspends a sector erase
operation to allow data to be read from, or
programmed into, any sector not being
erased
GENERAL DESCRIPTION
The HY29F400 is a 4 Megabit, 5 volt only CMOS
Flash memory organized as 524,288 (512K) bytes
or 262,144 (256K) words. The device is offered in
industry-standard 44-pin PSOP and 48-pin TSOP
packages.
The HY29F400 can be programmed and erased
in-system with a single 5-volt V
CC
supply. Inter-
nally generated and regulated voltages are pro-
vided for program and erase operations, so that
the device does not require a high voltage power
supply to perform those functions. The device can
also be programmed in standard EPROM pro-
grammers. Access times as fast as 55 ns over
the full operating voltage range of 5.0 volts ± 10%
are offered for timing compatibility with the zero
wait state requirements of high speed micropro-
Revision 5.2, May 2001
n
Sector Protection
– Any combination of sectors may be
locked to prevent program or erase
operations within those sectors
n
Temporary Sector Unprotect
– Allows changes in locked sectors
(requires high voltage on RESET# pin)
n
Internal Erase Algorithm
– Automatically erases a sector, any
combination of sectors, or the entire chip
n
Internal Programming Algorithm
– Automatically programs and verifies data
at a specified address
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Fast Program and Erase Times
– Byte programming time: 7 µs typical
– Sector erase time: 1.0 sec typical
– Chip erase time: 11 sec typical
n
Data# Polling and Toggle Status Bits
– Provide software confirmation of
completion of program or erase
operations
n
Ready/Busy# Output (RY/BY#)
– Provides hardware confirmation of
completion of program and erase
operations
n
100,000 Program/Erase Cycles Minimum
n
Space Efficient Packaging
– Available in industry-standard 44-pin
PSOP and 48-pin TSOP and reverse
TSOP packages
LOGIC DIAGRAM
18
A[17:0]
DQ[7:0]
7
CE#
OE#
WE#
RESET#
BYTE#
RY/BY#
DQ[14:8]
DQ[15]/A-1
8