HY57V281620HC(L/S)T-I
AC CHARACTERISTICS I
(AC operating conditions unless otherwise noted)
-6I
Parameter
Symbol
Min
System Clock
Cycle Time
CAS Latency = 3
CAS Latency = 2
tCK3
tCK2
tCHW
tCLW
tAC3
tAC2
tOH
tDS
tDH
tAS
tAH
tCKS
tCKH
tCS
tCH
tOLZ
tOHZ3
tOHZ2
6
1000
10
2.5
2.5
-
-
2.0
1.5
0.8
1.5
0.8
1.5
0.8
1.5
0.8
1
2.7
2.7
-
-
5.4
6
-
-
-
-
-
-
-
-
-
-
5.4
5.4
10
2.5
2.5
-
-
2.0
1.5
0.8
1.5
0.8
1.5
0.8
1.5
0.8
1
2.7
2.7
-
-
5.4
6
-
-
-
-
-
-
-
-
-
-
5.4
5.4
7.5
2.5
2.5
-
-
2.0
1.5
0.8
1.5
0.8
1.5
0.8
1.5
0.8
1
2.7
2.7
-
-
5.4
5.4
-
-
-
-
-
-
-
-
-
-
5.4
5.4
10
2.5
2.5
-
-
2.0
1.5
0.8
1.5
0.8
1.5
0.8
1.5
0.8
1
2.7
3
-
-
5.4
6
-
-
-
-
-
-
-
-
-
-
5.4
6
Max
Min
7
Max
1000
Min
7.5
Max
1000
Min
7.5
1000
10
3
3
-
-
2.0
2
1
2
1
2
1
2
1
1
3
3
-
-
6
6
-
-
-
-
-
-
-
-
-
-
6
6
Max
Min
8
1000
10
3
3
-
-
2.0
2
1
2
1
2
1
2
1
1
3
3
-
-
6
6
-
-
-
-
-
-
-
-
-
-
6
6
Max
Min
10
1000
12
3
3
-
-
2.0
2
1
2
1
2
1
2
1
1
3
3
-
-
6
6
-
-
-
-
-
-
-
-
-
-
6
6
Max
Min
10
1000
ns
ns
ns
ns
2
CAS Latency = 2
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1
1
1
1
1
1
1
1
1
1
Max
ns
-7I
-KI
-HI
-8I
-PI
-SI
Unit
Note
Clock High Pulse Width
Clock Low Pulse Width
Access Time
From Clock
CAS Latency = 3
Data-Out Hold Time
Data-Input Setup Time
Data-Input Hold Time
Address Setup Time
Address Hold Time
CKE Setup Time
CKE Hold Time
Command Setup Time
Command Hold Time
CLK to Data Output in Low-Z Time
CLK to Data
Output in High-Z
Time
CAS Latency = 3
CAS Latency = 2
Note :
1.Assume tR / tF (input rise and fall time ) is 1ns
If tR & tF > 1ns, then [(tR+tF)/2-1]ns should be added to the parameter
2.Access times to be measured with input signals of 1v/ns edge rate, from 0.8v to 2.0v
If tR > 1ns, then (tR/2-0.5)ns should be added to the parameter
Rev. 1.0/Mar. 02
7
HYNIX [ HYNIX SEMICONDUCTOR ]
