HY57V653220B
AC CHARACTERISTICS I
(AC operating conditions unless otherwise noted)
-5
Parameter
Symbol
Min
System clock
cycle time
CAS Latency = 3 tCK3
CAS Latency = 2 tCK2
tCHW
tCLW
5
1000
10
2
2
-
-
1.5
1.5
1
1.5
1
1.5
1
1.5
1
1
-
-
-
-
4.5
6
-
-
-
-
-
-
-
-
-
-
4.5
6
10
2.25
2.25
-
-
2
1.5
1
1.5
1
1.5
1
1.5
1
1
-
-
-
-
5
6
-
-
-
-
-
-
-
-
-
-
5
6
Max
Min
5.5
1000
10
2.5
2.5
-
-
2
1.5
1
1.5
1
1.5
1
1.5
1
1
-
-
-
-
5.5
6
-
-
-
-
-
-
-
-
-
-
5.5
6
Max
Min
6
1000
10
3
3
-
-
2
1.75
1
1.75
1
1.75
1
1.75
1
1
-
-
-
-
5.5
6
-
-
-
-
-
-
-
-
-
-
5.5
6
Max
Min
7
1000
10
3
3
-
-
2
2
1
2
1
2
1
2
1
1
-
-
-
-
6
6
-
-
-
-
-
-
-
-
-
-
6
6
Max
Min
8
1000
10
3
3
-
-
2
2
1
2
1
2
1
2
1
1
-
-
-
-
6
6
-
-
-
-
-
-
-
-
-
-
6
6
Max
Min
10
1000
12
3.5
3.5
-
-
2
2.5
1
2.5
1
2.5
1
2.5
1
1
-
-
-
-
6
6
-
-
-
-
-
-
-
-
-
-
6
6
Max
Min
10
1000
ns
ns
ns
ns
2
CAS Latency = 2 tAC2
tOH
tDS
tDH
tAS
tAH
tCKS
tCKH
tCS
tCH
tOLZ
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
3
1
1
1
1
1
1
1
1
1
1
Max
ns
-55
-6
-7
-8
-10P
-10
Unit
Note
Clock high pulse width
Clock low pulse width
Access time from
clock
Data-out hold time
Data-Input setup time
Data-Input hold time
Address setup time
Address hold time
CKE setup time
CKE hold time
Command setup time
Command hold time
CLK to data output in low Z-time
CLK to data
output in high Z-
time
CAS Latency = 3 tAC3
CAS Latency = 3 tOHZ3
CAS Latency = 2 tOHZ2
Note :
1.Assume tR / tF (input rise and fall time ) is 1ns
2.Access times to be measured with input signals of 1v/ns edge rate, 0.8v to 2.0v
3.Data-out hold time to be measured under 30pF load condition, without Vt termination
Rev.1.6/Dec. 01
7
HYNIX [ HYNIX SEMICONDUCTOR ]
