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HY628400A 参数 Datasheet PDF下载

HY628400A图片预览
型号: HY628400A
PDF下载: 下载PDF文件 查看货源
内容描述: 512K ×8位5.0V低功耗CMOS SRAM慢 [512K x8 bit 5.0V Low Power CMOS slow SRAM]
分类和应用: 静态存储器
文件页数/大小: 11 页 / 182 K
品牌: HYNIX [ HYNIX SEMICONDUCTOR ]
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HY628400A Series
DESCRIPTION
The HY628400A is a high-speed, low power and
4M bits CMOS SRAM organized as 512K words
by 8 bits. The HY628400A uses Hynix's high
performance twin tub CMOS process technology
and was designed for high-speed and low power
circuit technology. It is particularly well suited for
use in high-density and low power system
applications. This device has a data retention
mode that guarantees data to remain valid at the
minimum power supply voltage of 2.0V.
Product
Voltage
Speed
No.
(V)
(ns)
HY628400A
4.5~5.5 55/70/85
HY628400A-E 4.5~5.5 55/70/85
HY628400A-I
4.5~5.5 55/70/85
Note 1. Current value is max.
Operation
Current/Icc(mA)
10
10
10
FEATURES
Fully static operation and Tri-state outputs
TTL compatible inputs and outputs
Low power consumption
Battery backup(L/LL-part)
-. 2.0V(min) data retention
Standard pin configuration
-. 32pin 525mil SOP
-. 32pin 400mil TSOP-II
(Standard and Reversed)
Standby Current(uA)
L
LL
100
30
100
50
100
50
Temperature
(°C)
0~70
-25~85
-40~85
PIN CONNECTION
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
Vss
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
Vcc
A15
A17
/WE
A13
A8
A9
A11
/OE
A10
/CS
I/O8
I/O7
I/O6
I/O5
I/O4
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
Vss
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
Vcc
A15
A17
/WE
A13
A8
A9
A11
/OE
A10
/CS
I/O8
I/O7
I/O6
I/O5
I/O4
Vcc
A15
A17
/WE
A13
A8
A9
A11
/OE
A10
/CS
I/O8
I/O7
I/O6
I/O5
I/O4
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
Vss
SOP
TSOP-II(Standard)
TSOP-II(Reversed)
PIN DESCRIPTION
Pin Name
/CS
/WE
/OE
A0 ~ A18
I/O1 ~ I/O8
Vcc
Vss
Pin Function
Chip Select
Write Enable
Output Enable
Address Inputs
Data Inputs/Outputs
Power(4.5~5.5V)
Ground
BLOCK DIAGRAM
A0
ROW DECODER
I/O1
SENSE AMP
ADD INPUT BUFFER
COLUMN DECODER
DATA I/O
BUFFER
MEMORY ARRAY
512Kx 8
WRITE DRIVER
I/O8
A18
/CS
/OE
/WE
CONTROL
LOGIC
Rev 07 / Apr. 2001
2