iC-JX
16-FOLD 24 V HIGH-SIDE DRIVER WITH µC INTERFACE
Rev C1, Page 10/36
ELECTRICAL CHARACTERISTICS
Operating conditions: VCC = VDD = 3 ... 5.5 V, VBy = 12 ... 36 V, GNDA = GNDD = 0 V, RSET = 10 kΩ ±1% . All inputs on defined logic
states (high or low), Tj = -40 ... 125 °C unless otherwise stated. Functionality and parameters beyond operating conditions (for example
w.r. to independent voltage supplies) are to be verified within the individual application by FMEA methods.
Item
No.
K02
Symbol
Vt()lo
Parameter
Conditions
Min.
Threshold voltage Low at
D0...7 with input function
Schmitt-Trigger-Inputs
NCS, NWR, NRD, A0...4, NRES,
CLK, BLFQ, D0...7, NSP, POE
Schmitt-Trigger-Hysteresis at
Vt()hys = Vt()hi - Vt()lo;
inputs NCS, NWR, NRD, A0...4, D0...7 mit Eingangsfunktion
NRES, CLK, BLFQ, D0...7, NSP,
POE
Saturation voltage high
an NINT, Dx
Saturation voltage low
an NINT, Dx
Pull Down current sources at
A0...4, NRES, CLK, BLFQ,
D0...7, POE
Pull Up current sources at NSP,
NCS, NWR, NRD
Delay time output enable:
POE to IOx disabled
Permissible pulse width for en-
able/disable at POE
Permissible burst pulse width at
POE
200
Vs()hi = VDD - V( );
I( ) = -4 mA
I( ) = 4 mA
V() = 1V .. VDD
2
0.8
Typ.
Max.
V
Unit
K03
Vt()hys
150
mV
K04
K05
K06
Vs()hi
Vs()lo
Ipd()
0.8
0.49
70
V
V
µA
K07
K08
K09
K10
K11
Ipu()
tp(POE-
IOx)
tw()lo
tw()
V() = 0V .. VDD - 1 V
RL = 240
Ω...
1 kΩ, POE: hi
→
lo
to V(IOx) < 80 % (VBy - Vs(IOx)hi)
-70
2
6
µA
µs
ns
600
100
ns
ns
tmin()nres minimum duration for reset at
NRES
td()
td()
maximum frequency at CLK
maximum frequency at BLFQ
Frequency BLFQ, CLK
P01
P02
TBD
TBD
MHz
MHz
Characteristics: Diagrams
Figure 1: DC load
Figure 2: Pulse load
ICHAUS [ IC-HAUS GMBH ]
