iC-MQ
PROGRAMMABLE 9-BIT
Sin/Cos INTERPOLATION IC WITH RS422 DRIVER
Rev D4, Page 7/39
ELECTRICAL CHARACTERISTICS
Operating Conditions: VDD = 4.3...5.5 V, Tj = -40 °C...125 °C, IBN calibrated to 200 µA, unless otherwise stated
Item
No.
118
119
120
121
122
123
Symbol
∆PHI12
Parameter
Phase Error Calibration Step
Width
limited test coverage (guaranteed by design)
-0.8
200
95
0.5
20
27
100
105
VDDS
−
2
30
Conditions
Min.
Typ.
0.63
0.8
Max.
°
°
kHz
%
V
kΩ
Unit
INL(PHI12) Integral Linearity Error of Phase
Calibration
fin()
Vout(X2)
Vin(X2)
Rin(X2)
Output Voltage at X2
Permissible Maximum Input Freq. analog signal path
BIASEX = 10, I(X2) = 0, referenced to VRE-
Fin12
Permissible Input Voltage Range BIASEX = 11
at X2
Input Resistance at X2
BIASEX = 11, RIN0(3:0) = 0x01, RIN12(3:0) =
0x01
referenced to 360° input signal, ideal waveform,
quasi static signals, adjusted signal condition-
ing, SELHYS = 0
referenced to output period T (see Fig. 1), ideal
waveform, quasi static signals;
at 4 edges per period
at 100 edges per period
at 384 edges per period
at 400 edges per period
see 201; VDD = const., T
j
= const.
Vs() = VDD - V();
SIK(1:0) = 00, I() = -1.2 mA
SIK(1:0) = 01, I() = -4 mA
SIK(1:0) = 10, I() = -20 mA
SIK(1:0) = 11, I() = -50 mA
SIK(1:0) = 00, I() = 1.2 mA
SIK(1:0) = 01, I() = 4 mA
SIK(1:0) = 10, I() = 20 mA
SIK(1:0) = 11, I() = 50 mA
V() = 0 V;
SIK(1:0) = 00
SIK(1:0) = 01
SIK(1:0) = 10
SIK(1:0) = 11
V() = VDD;
SIK(1:0) = 00
SIK(1:0) = 01
SIK(1:0) = 10
SIK(1:0) = 11
RL = 100
Ω
to GND;
SSR(1:0) = 00
SSR(1:0) = 01
SSR(1:0) = 10
SSR(1:0) = 11
RL = 100
Ω
to VDD;
SSR(1:0) = 00
SSR(1:0) = 01
SSR(1:0) = 10
SSR(1:0) = 11
TRIHL(1:0) = 11 (tristate)
reversed supply voltage
Op. modes
Calibration 1, 2, 3
Op. modes
Calibration 1, 2, 3
Sine-To-Digital Conversion
201
AAabs
Absolute Angle Accuracy
0.9
1.8
°
202
AArel
Relative Angle Accuracy
<0.5
<2
0.1
10
10
10
10
%
%
%
%
°
203
AAR
Repeatability
Line Driver Outputs PA, NA, PB, NB, PZ, NZ
501 Vs()hi
Saturation Voltage hi
200
200
400
700
200
200
400
700
-4
-12
-60
-150
1.2
4
20
50
5
5
20
50
5
5
30
50
20
100
2.5
-3
110
800
50
4
3
-1.2
-4
-20
-50
4
12
60
150
20
40
140
350
20
40
140
350
100
mV
mV
mV
mV
mV
mV
mV
mV
mA
mA
mA
mA
mA
mA
mA
mA
ns
ns
ns
ns
ns
ns
ns
ns
µA
µA
kΩ
µA
ns
ns
%
502
Vs()lo
Saturation Voltage lo
503
Isc()hi
Short-Circuit Current hi
504
Isc()lo
Short-Circuit Current lo
505
tr()
Rise Time
506
tf()
Fall Time
507
508
509
510
511
Ilk()tri
IIk()rev
Rin()cal
I()cal
tclk()lo
Leakage Current
Leakage Current
Test Signal Source Impedance
Permissible Test Signal Load
Clock Signal Low-Pulse Duration Op. mode
Mode 191/193;
MTD = 0x0
for CP, CPD, CPU
MTD = 0x7
Duty Cycle
referenced to output period T, see Fig. 1
512
tw()hi
ICHAUS [ IC-HAUS GMBH ]
