iC-PN3312
preliminar y
Rev A1, Page 3/7
PHASED ARRAY NONIUS ENCODER 33-512
PIN CONFIGURATION
oBGA LSH2C (6.2 mm x 5.2 mm)
PIN FUNCTIONS
No. Name Function
A2
A3
A4
B1
B2
B3
B4
C1
C2
C3
C4
D1
D2
D3
D4
VCC
VREF
GND
PS_N
NS_N
NC_N
PC_N
PS_M
NS_M
NC_M
PC_M
PS_S
NS_S
NC_S
PC_S
+4.5..5.5 V Supply Voltage
Reference Voltage Output
Ground
N-Track Sine +
N-Track Sine -
N-Track Cosine -
N-Track Cosine +
M-Track Sine +
M-Track Sine -
M-Track Cosine -
M-Track Cosine +
S-Track Sine +
S-Track Sine -
S-Track Cosine -
S-Track Cosine +
1
A
B
C
D
2
3
4
PIN CONFIGURATION
oQFN32-5x5 (5 mm x 5 mm)
PIN FUNCTIONS
No. Name Function
1
2
3
4
5
6
7
8
17
18
19
20
21
22
24
VCC
VREF
PS_N
NS_N
PS_M
NS_M
PS_S
NS_S
NC_S
PC_S
NC_M
PC_M
NC_N
PC_N
GND
BP
+4.5..5.5 V Supply Voltage
Reference Voltage Output
N-Track Sine +
N-Track Sine -
M-Track Sine +
M-Track Sine -
S-Track Sine +
S-Track Sine -
S-Track Cosine -
S-Track Cosine +
M-Track Cosine -
M-Track Cosine +
N-Track Cosine -
N-Track Cosine +
Ground
Backside pad (oQFN32-5x5 only):
not intended as an electrical connection
point; when using as shield a single link
to GND is permissible.
32 31 30 29 28 27 26 25
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16
24
23
22
21
20
19
18
17
Package qualification optoQFN32-5x5 pending.