iC-TW2
8-BIT SIN/COS INTERPOLATION IC
WITH INTEGRATED EEPROM
Rev D3, Page 8/30
REGISTER MAP
Register Map
Adr
0x00
Bit 7
Bit 6
Bit 5
IDA(3:0)
Bit 4
Bit 3
Bit 2
Bit 1
IDB(3:0)
Bit 0
Device Indentification
Operating Modes
0x01
RESET
(P. 21)
CALIB1
(P. 17)
STARTUP(1:0)
(P. 21)
INTER(7:0)
(P. 12)
IPOS(7:0)
(P. 13)
IWIDTH(7:0)
(P. 13)
DIR
(P. 12)
MODE(1:0)
(P. 12)
Interpolation Rate
0x02
Index Position
0x03
Index Width
0x04
Conversion Settings
0x05
0x06
GRANU-
LAR
(P. 27)
FREQ(6:0)
(P. 20)
FILTER(1:0)
(P. 20)
GFB(1:0)
(P. 11)
GFA(1:0)
(P. 11)
OFSA(5:0)
(P. 11)
OFSB(5:0)
(P. 11)
HYST(1:0)
(P. 20)
GC(2:0)
(P. 11)
Gain and Offset
0x07
0x08
0x09
Bias and Oscillator Trimming
0x0A
VC(1:0)
(P. 27)
OFSZ(3:0)
(P. 17)
CLOCK(4:0)
(P. 17)
EN_MON
(P. 27)
CLKDLY
(P. 27)
CLKDIV
(P. 20)
CLKMODE
(P. 27)
Index Computation and Miscellaneous
0x0B
Reserved and Calibration
0x0C
0x0D
Reserved
(P. 27)
Reserved
(P. 27)
EE_READ
(P. 27)
CALIB2
EEPROM Control
0x0E
EE_WRITE
(P. 26)
Reserved
(P. 27)
Test Register
0x0F
MONITOR(7:0)
(P. 27)
Table 4: Register Map
ICHAUS [ IC-HAUS GMBH ]
