ICM7102B
LOW COST SINGLE CHIP TELEPHONE IC
FUNCTIONAL DESCRIPTION
SYSTEM STARTUP
1600Hz on the MO pin. Note that MO is an
openꢀdrain pin.
ICM7102B generates internal powerꢀonꢀreset
when VDD reaches around 1.5V. Powerꢀonꢀ
reset appropriately initiates the system to a
known initial state. Note that the initial ramp
up of VDD could come from external ringer
interface circuit, or it could come from internal
regulator when the system goes offꢀhook.
SPEECH NETWORK
The speech network of ICM7102B consists of a
transmitter and a receiver path, side tone
cancellation and line loss compensation.
As long as HS_DPB pin stays LOW, ICM7102B
operates in shutdown mode with only the
ringer circuitry being activated to monitor the
incoming ringing signal.
The speech network is activated as soon as
the phone goes offꢀhook (i.e. when HS_DPB
pin goes HIGH). At the same time the ringer
circuitry is deactivated.
Transmit
OSCILLATOR
The typical total transmit gain from
microphone input (M1/M2 pins) to the VDDI
pin is 35dB when the AC impedance is 600ꢁ.
All the timing of ICM7102B is based on a clock
frequency of 3.58 MHz. A Crystal or ceramic
resonator of this frequency should be
connected to OSC1 and OSC2 pins. Care has
to be taken in selecting this components since
in practise minor deviations from the nominal
frequency may occur due to the characteristics
of the oscillator.
Receive
The typical total receive gain from the line
voltage to RXO pin is 5dB when the AC
impedance is 600ꢁ.
Side Tone Cancellation
It is recommended to connect a small value
As shown in the typical application circuit in
Appendix A, side tone cancellation can be
achieved best by balancing the Whitestone
bridge comprised of R11, R12, R13+R14//C6,
and the line impedance.
capacitors (≤ 47pF) in
parallel with the
oscillator to ensure proper startꢀup and
operation at the nominal frequency.
TONE RINGER
Line Loss Compensation
The tone ringer of ICM7102B consists of ring
detection circuit and melody generator circuit.
These circuits are active when the system is in
onꢀhook state (HS_DPB pin is LOW).
LLC pin input level is scanned as the phone
goes offꢀhook (i.e. as HS_DPB pin goes HIGH).
At the same time, the loop current level is
sensed and determined. If LLC=0, no
compensation scheme is in effect.
Ring Detection Circuit
Ring detection circuit will assures the signal
present on RGD pin input is valid. The signal is
considered valid if it has frequencies between
13Hz and 70Hz. This signal is monitored
continuously and the ring melody is turned
on/off accordingly.
If LLC=AGND, “low” compensation scheme is
in effect. Transmit and receive gains are
reduced by as much as 6dB when the loop
current exceeds 50mA.
If LLC=VDD, “high” compensation scheme is in
effect. Transmit and receive gains are reduced
by as much as 6dB when the loop current
exceeds 75mA.
Melody Generator
Once the valid ring signal is detected on the
schmittꢀtriggered ring detection pin (RGD) and
the signal is present for about 75 ms
continously, the melody generator will be
enabled, generating ring tones of 1250Hz and
AC Impedance (ZAC)
Placing a resistor, RZAC between CI and AGND
pins adjusts the AC impedance. If RZAC is not
Rev. 2.7
ICmic reserves the right to change the specifications without prior notice
4
ICMIC [ IC MICROSYSTEMS ]
