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ICM7333Q 参数 Datasheet PDF下载

ICM7333Q图片预览
型号: ICM7333Q
PDF下载: 下载PDF文件 查看货源
内容描述: 双12 /10/ 8位电压输出DAC ,可调节输出增益串行接口 [Dual 12/10/8-Bit Voltage Output DACs Serial Interface with Adjustable Output Gain]
分类和应用: 转换器光电二极管
文件页数/大小: 11 页 / 121 K
品牌: ICMIC [ IC MICROSYSTEMS ]
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ICmic
Symbol
IC MICROSYSTEMS
Dual 12/10/8-Bit Voltage Output DACs
Serial Interface with Adjustable Output Gain
ICM7373/7353/7333
Parameter
Test Conditions
Min
Typ
Max
Unit
OUTPUT CHARACTERISTICS
Output Voltage Range
VO
SC
R
OUT
Short Circuit Current
Amp Output Impedance
Output Line Regulation
LOGIC INPUTS
V
IH
V
IL
Digital Input High
Digital Input Low
Digital Input Leakage
REFERENCE
V
REFOUT
Reference Output
Reference Output Line
Regulation
1.2
1.25
0.8
1.3
4.0
V
mV/V
(Note 2)
(Note 2)
2.4
0.8
5
V
V
µΑ
At Mid-scale (Note 2)
At 0-scale (Note 2)
V
DD
=2.7 to 3.6 V
(Note 3)
0
60
1.0
100
0.4
V
DD
150
5.0
200
3.0
V
mA
mV/V
AC ELECTRICAL CHARACTERISTICS
(V
DD
= 2.7V to 5.5V; V
OUT
unloaded; all specifications T
MIN
to T
MAX
unless otherwise noted)
Symbol
SR
Parameter
Slew Rate
Settling Time
Mid-scale Transition Glitch
Energy
Test Conditions
Min
Typ
2
8
40
Max
Unit
V/µs
µs
nV-S
Note 1:
Note 2:
Note 3:
Linearity is defined from code 64 to 4095 (ICM7373)
Linearity is defined from code 16 to 1023 (ICM7353)
Linearity is defined from code 4 to 255 (ICM7333)
Guaranteed by design; not tested in production
See Applications Information
TIMING CHARACTERISTICS
(V
DD
= 2.7V to 5.5V; all specifications T
MIN
to T
MAX
unless otherwise noted)
Symbol
t
1
t
2
t
3
t
4
t
5
t
6
Parameter
SCK Cycle Time
Data Setup Time
Data Hold Time
SCK Falling edge to CS Rising Edge
CS Falling Edge to SCK Rising Edge
CS Pulse Width
Test
Conditions
(Note 2)
(Note 2)
(Note 2)
(Note 2)
(Note 2)
(Note 2)
Min
30
10
10
0
15
20
Typ
Max
Unit
ns
ns
ns
ns
ns
ns
Rev. A1
ICmic reserves the right to change the specifications without prior notice.
4