欢迎访问ic37.com |
会员登录 免费注册
发布采购

X24320V 参数 Datasheet PDF下载

X24320V图片预览
型号: X24320V
PDF下载: 下载PDF文件 查看货源
内容描述: 400kHz的2线串行E2PROM与锁座 [400KHz 2-Wire Serial E2PROM with Block Lock]
分类和应用: 可编程只读存储器
文件页数/大小: 17 页 / 302 K
品牌: ICMIC [ IC MICROSYSTEMS ]
 浏览型号X24320V的Datasheet PDF文件第1页浏览型号X24320V的Datasheet PDF文件第2页浏览型号X24320V的Datasheet PDF文件第4页浏览型号X24320V的Datasheet PDF文件第5页浏览型号X24320V的Datasheet PDF文件第6页浏览型号X24320V的Datasheet PDF文件第7页浏览型号X24320V的Datasheet PDF文件第8页浏览型号X24320V的Datasheet PDF文件第9页  
X24320  
Clock and Data Conventions  
DEVICE OPERATION  
The device supports a bidirectional bus oriented  
protocol. The protocol defines any device that sends  
Data states on the SDA line can change only during  
SCL LOW. SDA state changes during SCL HIGH are  
reserved for indicating start and stop conditions. Refer to  
Figures 1 and 2.  
data onto the bus as a transmitter, and the receiving device  
as the receiver. The device controlling the  
transfer is a master and the device being controlled is the  
slave. The master will always initiate data transfers  
Start Condition  
All commands are preceded by the start condition,  
which is a HIGH to LOW transition of SDA when SCL  
and provide the clock for both transmit and receive  
operations. Therefore, the device will be  
is HIGH. The device continuously monitors the SDA and  
SCL lines for the start condition and will not  
considered a slave in all applications.  
respond to any command until this condition has been met.  
Figure 1. Data Validity  
SCL  
SDA  
DATA  
CHANGE  
DATA STABLE  
7035 FM 03  
Figure 2. Definition of Start and Stop  
SCL  
SDA  
START BIT  
STOP BIT  
7035 FM 04  
3