X24645
DEVICE OPERATION
The X24645 supports a bidirectional bus oriented pro-
tocol. The protocol defines any device that sends data
Clock and Data Conventions
Data states on the SDA line can change only during
SCL LOW. SDA state changes during SCL HIGH are
reserved for indicating start and stop conditions. Refer to
Figures 1 and 2.
onto the bus as a transmitter, and the receiving device as
the receiver. The device controlling the transfer is a
master and the device being controlled is the slave.
The master will always initiate data transfers, and provide
Start Condition
All command are preceded by the start condition, which
is a HIGH to LOW transition of SDA when SCL is
the clock for both transmit and receive operations.
Therefore, the X24645 will be considered a slave in all
HIGH. The X24645 continuously monitors the SDA and SCL
lines for the start condition and will not respond to
any command until this condition has been met.
applications.
Figure 1. Data Validity
SCL
SDA
DATA
CHANGE
DATA STABLE
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Notes: (5) Typical values are for TA = 25°C and nominal supply voltage (5V)
(6) tWR is the minimum cycle time from the system perspective when polling techniques are not used. It is the maximum time the
device requires to perform the internal write operation.
Figure 2. Definition of Start and Stop
SCL
SDA
START BIT
STOP BIT
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3
ICMIC [ IC MICROSYSTEMS ]
