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X25170PTG-V 参数 Datasheet PDF下载

X25170PTG-V图片预览
型号: X25170PTG-V
PDF下载: 下载PDF文件 查看货源
内容描述: SPI串行ê 2 PROM与块锁保护⑩ [SPI Serial E 2 PROM with Block Lock ⑩ Protection]
分类和应用: 可编程只读存储器
文件页数/大小: 15 页 / 132 K
品牌: ICMIC [ IC MICROSYSTEMS ]
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This X25170 device has been acquired by
IC MICROSYSTEMS from Xicor, Inc.
ICmic
TM
IC MICROSYSTEMS
16K
X25170
SPI Serial E
2
PROM with Block Lock
2K x 8 Bit
Protection
FEATURES
•5MHz Clock Rate
•SPI Modes (0,0 & 1,1)
•2K X 8 Bits
—32 byte page mode
•Low Power CMOS
—<1µA standby current
—<5mA active current
•2.5V To 5.5V Power Supply
•Block Lock Protection
—Protect 1/4, 1/2 or all of E
2
PROM array
Built-In Inadvertent Write Protection
—Power-up/power-down protection circuitry
—Write enable latch
—Write protect pin
•Self-Timed Write Cycle
—5ms write cycle time (typical)
•High Reliability
—Endurance: 100,000 cycles
—Data retention: 100 Years
—ESD protection: 2000V on all pins
•8-Lead PDlP Package
•8-Lead SOIC Package
•14-Lead
TSSOP Package
DESCRIPTION
The X25170 is a CMOS 16384-bit serial E2PROM,
internally organized as 2K x 8. The X25170 features a
Serial Peripheral Interface (SPI) and software protocol,
allowing operation on a simple three-wire bus. The bus
signals are a clock input (SCK) plus separate data in (SI)
and data out (SO) lines. Access to the device is
controlled through a chip select (CS) input, allowing any
number of devices to share the same bus.
The X25170 also features two additional inputs that
provide the end user with added flexibility. By asserting
the HOLD input, the X25170 will ignore transitions on its
inputs, thus allowing the host to service higher prior-
ity interrupts. The WP input can be used as a hardwire input
to the X25170 (disabling all write attempts to the
status register), thus providing a mechanism for limiting end
user capability of altering 0, 1/4, 1/2 or all of the memory.
The X25170 utilizes Xicor’s proprietary Direct Write
cell,
providing a minimum endurance of 100,000 cycles and a
minimum data retention of 100 years.
BLOCK DIAGRAM
Status
Register
Write
Protect
Logic
X Decode
Logic
2K Byte
Array
16
SO
SI
SCK
CS
Command
Decode
16 X 256
HOLD
and
Control
Logic
16
16 X 256
32
32 X 256
Write
Control
and
Timing
Logic
WP
32
8
Y Decode
Data Register
Direct Write
and Block Lock
Protection is a trademark of Xicor, Inc.
©
Xicor, Inc. 2000 Patents Pending
9900-5004.9 5/26/00 EP
Characteristics subject to change without notice.
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