Integrated
Circuit
Systems, Inc.
ICS83052I
2:1, S
INGLE
-E
NDED
M
ULTIPLEXER
A
PPLICATION
I
NFORMATION
R
ECOMMENDATIONS FOR
U
NUSED
I
NPUT AND
O
UTPUT
P
INS
I
NPUTS
:
O
UTPUTS
:
CLK I
NPUT
:
For applications not requiring the use of the test clock, it can
be left floating. Though not required, but for additional
protection, a 1kΩ resistor can be tied from the CLK input to
ground.
C
ONTROL
P
INS
:
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1kΩ resistor can be used.
LVCMOS O
UTPUT
:
All unused LVCMOS output can be left floating. We
recommend that there is no trace attached.
R
ELIABILITY
I
NFORMATION
T
ABLE
6.
θ
JA
VS
. A
IR
F
LOW
T
ABLE
FOR
8 L
EAD
TSSOP
θ
JA
by Velocity (Meters per Second)
0
Multi-Layer PCB, JEDEC Standard Test Boards
101.7°C/W
1
90.5°C/W
2.5
89.8°C/W
T
RANSISTOR
C
OUNT
The transistor count for ICS83052I is: 967
83052AGI
www.icst.com/products/hiperclocks.html
10
REV. A AUGUST 2, 2005
ICS [ INTEGRATED CIRCUIT SYSTEMS ]
