Integrated
Circuit
Systems, Inc.
ICS1893AF
Product Brief
3.3V 10Base-T/100Base-TX Integrated PHYceiver™
General
The ICS1893AF is a lower cost, re-packaged version of
the ICS1893Y-10. The ICS1893AF is a fully integrated,
Physical Layer device (PHY) that is compliant with both
the 10Base-T and 100Base-TX CSMA/CD Ethernet
Standard, ISO/IEC 8802-3. The ICS1893AF uses the
same proven silicon as the ICS1893Y-10 but offers a
lower cost solution by using a lower cost 300mil 48-lead
SSOP package.
All parametric specifications and timing diagrams for the
ICS1893Y-10 apply to the ICS1893AF. Refer to the
1893 Data Sheet for detailed specifications and timings.
The ICS1893AF uses the same twisted-pair transmit and
receive circuits as the ICS1893Y-10, and the same
recommended board layout techniques apply to the
ICS1893AF.
The ICS1893AF is intended for Node applications using
the standard MII interface to the MAC.
All changes are listed in the ICS1893AF / ICS1893Y-10
Feature Set Comparison Table on page 2.
ICS1893AF Features
•
Single 3.3V power supply
•
Supports category 5 cables with attenuation in excess
of 24dB at 100 MHz across a temperature range from -
5º to +85º C.
•
DSP-based baseline wander correction to virtually
eliminate killer packets across temperature range of
-5º to +85º C.
•
Low-power, 0.35-micron CMOS (typically 400mW)
•
Single-chip, fully integrated PHY provides PCS, PMA,
PMD and AUTONEG Sublayers of the IEEE Std.
•
10Base-T and 100Base-TX IEEE 8802-3 compliant
•
Clock or crystal supported.
•
•
•
•
Media Independent Interface (MII) supported.
Managed or Unmanaged Applications
10M or 100M Half and Full Duplex Modes
Auto-Negotiation with Next Page. Parallel detection
for Legacy products.
•
Fully-integrated, DSP-based PMD includes:
- Adaptive equalization and baseline wander correction
- Transmit wave shaping and stream cipher scrambler
- MLT-3 encoder and NRZ/NRZI encoder
•
Highly configurable supports:
- Node applications, managed or unmanaged
- 10M or 100M half and full duplex modes
•
Loopback mode for Diagnostic Functions
•
Small footprint 48-lead 300mil SSOP package.
100Base-TX
10/100 MII
MAC
Interface
Interface
Mux
PCS
•
Framer
•
CRS/COL Detection
•
Parallel to Serial
•
4B/5B
PMA
•
Clock Recovery
•
Link Monitor
•
Signal Detection
•
Error Detection
TP_PMD
•
MLT-3
•
Stream Cipher
•
Adaptive Equalizer
•
Base Line Wander
•
Correction
Integrated
Switch
10Base-T
MII
Extended
Register
Set
Low
Jitter
Clock
Synthesizer
Configuration
and
Status
Auto-
Negotiation
Twisted Pair
Interface to
Magnetics
Modules &
RJ45
Connector
MII
Management
Interface
Clock
Power
LEDs &
PHY Address
ICS1893 Block Diagram
Page 1
Document Revision: 5 April 2002
ICS [ INTEGRATED CIRCUIT SYSTEMS ]
