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ICS1893Y-10 参数 Datasheet PDF下载

ICS1893Y-10图片预览
型号: ICS1893Y-10
PDF下载: 下载PDF文件 查看货源
内容描述: 3.3 -V的10Base -T / 100BASE - TX集成PHYceiver [3.3-V 10Base-T/100Base-TX Integrated PHYceiver]
分类和应用:
文件页数/大小: 7 页 / 390 K
品牌: ICS [ INTEGRATED CIRCUIT SYSTEMS ]
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ICS1893 Data Sheet - Release
Chapter 4
Overview of the ICS1893
Chapter 4 Overview of the ICS1893
The ICS1893 is a stream processor. During data transmission, it accepts sequential nibbles from its MAC
(Media Access Control)/Repeater Interface, converts them into a serial bit stream, encodes them, and
transmits them over the medium through an external isolation transformer. When receiving data, the
ICS1893 converts and decodes a serial bit stream (acquired from an isolation transformer that interfaces
with the medium) into sequential nibbles. It subsequently presents these nibbles to its MAC/Repeater
Interface.
The ICS1893 implements the OSI model’s physical layer, consisting of the following, as defined by the
ISO/IEC 8802-3 standard:
Physical Coding sublayer (PCS)
Physical Medium Attachment sublayer (PMA)
Physical Medium Dependent sublayer (PMD)
Auto-Negotiation sublayer
The ICS1893 is transparent to the next layer of the OSI model, the link layer. The link layer has two
sublayers: the Logical Link Control sublayer and the MAC sublayer. The ICS1893 can interface directly to
the MAC and offers multiple, configurable modes of operation. Alternately, this configurable interface can
be connected to a repeater, which extends the physical layer of the OSI model.
The ICS1893 transmits framed packets acquired from its MAC/Repeater Interface and receives
encapsulated packets from another PHY, which it translates and presents to its MAC/Repeater Interface.
Note:
As per the ISO/IEC standard, the ICS1893 does not affect, nor is it affected by, the underlying
structure of the MAC/repeater frame it is conveying.
ICS1893 Rev B 9/10/99
Copyright © 1999, Integrated Circuit Systems, Inc.
All rights reserved.
16
September, 1999