Integrated
Circuit
Systems, Inc.
ICS2495
Dual Video/Memory Clock Generator
Features
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Low cost - eliminates need for multiple crystal clock
oscillators in video display subsystems
Mask-programmable frequencies
Pre-programmed versions for Industry Standard VGA
chips
Glitch-free frequency transitions
Internal clock remains locked when the external frequency
input is selected
Low power CMOS device technology
Small footprint - 16-pin DIP or SOIC
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Buffered Xtal Out
Integral Loop Filter components
Fast acquisition of selected frequencies, strobed or non-
strobed
Guaranteed performance up to 135 MHz
Excellent power supply rejection
Advanced PLL for low phase-jitter
Frequency change detection circuitry enhances new fre-
quency acquisition and eliminates problems caused by
programs that rewrite frequency information
Description
The
ICS2495
Clock Generator is an integrated circuit dual
phase-locked loop frequency synthesizer capable of generating
16 video frequencies and 4 memory clock frequencies for use
with high performance video display systems. Utilizing CMOS
technology to implement all linear, digital and memory func-
tions, the
ICS2495
provides a low-power, small-footprint,
low-cost solution to the generation of video dot clocks. Outputs
are compatible with
XGA, VGA, EGA, MCGA, CGA, MDA,
as well as the higher frequencies needed for advanced applica-
tions in desktop publishing and workstation graphics. Provi-
sion is made via a single level custom mask to implement
customer specific frequency sets. Phase-locked loop circuitry
permits rapid glitch-free transitions between clock frequencies.
In addition to providing 16 clock rates, the
ICS2495
has
provisions to multiplex an externally-generated signal source
into the VCLK signal path. Internal phase-locked frequencies
continue to remain locked at their preset values when this mode
is selected. This feature permits instantaneous transition from
an external frequency to an internally-generated frequency.
Printed circuit board testing is simplified by the use of these modes
as an external clock generated by the ATE tester can be fed
through, permitting synchronous testing of the entire system.
Pin Configuration
XTAL2
EXTFREQ
FS0
FS1
STROBE
FS2
FS3
MS0
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
XTAL1
VCLK
XTALOUT
VSS
VDD
N/C
MCLK
MS1
16-Pin DIP or SOIC
Notes:
1. ICS2495M(SOIC) pinout is identical to ICS2495N(DIP).
ICS2595RevA090694
ICS [ INTEGRATED CIRCUIT SYSTEMS ]
