ICS307-03
S
ERIALLY
P
ROGRAMMABLE
C
LOCK
S
OURCE
Description
The ICS307-03 is a dynamic, serially programmable
clock source which is flexible and takes up minimal
board space. Output frequencies are programmed via
a 3-wire SPI port.
An advanced PLL coupled to an array of configurable
output dividers and three outputs allows low-jitter
generation of frequencies from 200 Hz to 270 MHz.
The device can be reprogrammed during operation,
making it ideal for applications where many different
frequencies are required, or where the output
frequency must be determined at run time. Glitch-free
frequency transitions, where the clock period changes
slightly over many cycles, are possible.
Features
•
Crystal or clock reference input
•
3.3 V CMOS outputs
•
Three outputs can be individually configured or shut
off
•
•
•
•
•
Small 16-pin TSSOP package
Reprogrammable during operation
3-wire SPI serial interface
Glitch-free output frequency switching
User selectable charge pump current and damping
resistor
control bit
•
Power-down control via hardware pin or software
•
Programming word can be generated by ICS
VersaClock II Software
•
Directly programmable via VersaClock II Software
and a Windows PC parallel port
•
Available in Pb (lead) free package
Block Diagram
Charge Pump
(Table 3)
X1
(Table 1)
REF Divide
1-2055
[Bit 122]
X2
VCO DIVIDE
12-2055
(Table 2)
1
0
DIN
CS
SCLK
Programming
Register
(132 bits)
[Bit 123]
Divider
2 - 34
(Table 6)
[Bit 111]
CLK2
Resistor
(Table 4)
300
pF
Divider
2 - 8232
(Table 5)
[Bit 110]
CP
11pF
CLK1
1
0
[Bit 124]
Divider
2 - 34
(Table 7)
[Bit 129]
CLK3
MDS 307-03 C
I n t e gra te d C i r c u i t S y s t e m s
●
1
5 25 Race Stre et, San Jo se, CA 9 5126
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Revision 101705
te l (40 8) 2 97-12 01
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w w w. i c st . c o m
ICS [ INTEGRATED CIRCUIT SYSTEMS ]
