ICS552-01
Oscillator, Multiplier, and Buffer with 8 Outputs
Description
The ICS552-01 produces 8 low-skew copies of the
multiple input clock or fundamental, parallel-mode
crystal. Unlike other clock drivers, these parts do not
require a separate oscillator for the input. Using ICS’
patented Phase-Locked Loop (PLL) to multiply the
input frequency, it is ideal for generating and
distributing multiple high-frequency clocks.
This is a
single chip used for 3 different applications:
1) ICS552-01 (A mode) — an Oscillator mutilpier
2) ICS552-01 (B mode) — a Dual 1:4 buffer
3) ICS552-01 (C mode) — a 1:8 Oscillator buffer
ICS552-01 (for B mode)
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Up to 200 MHz clock input/output at 3.3 V
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Low skew of 250 ps maximum for any bank of four
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Inputs can be connected together for a 1 to 8 buffer
with 250 ps skew between any outputs
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Non-inverting buffer mode
Ideal for clock networks
Output Enable mode tri-states outputs
Full CMOS output swing with 25 mA output drive
capability at TTL levels
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Advanced, low power, sub-micron CMOSprocess
ICS552-01 (for C mode)
Features (all)
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Packaged as 20-pin SSOP (QSOP)
Pb-free packaging available
Operating voltages of 3.0 V to 5.5 V
Industrial temperature available
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Use with 25 MHz crystal for networking
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Use with 27 MHz crystal for MPEG
ICS552-01 (for A and C modes)
Features (specific)
ICS552-01 (for A mode)
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Input frequency of 10.0 to 27.0 MHz
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Provides 8 low-skew outputs (<250 ps)
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Output clock duty cycle of 40/60 at 3.3 V
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Contains on-chip multiplier with selections of x1,
x1.33, x2, x2.66, x3, x3.33, x4, x4.66, x5, and x6
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Power-down and Tri-state modes
Block Diagram
(ICS552-01—A mode)
VDD
S3:S0
4
CLK1
CLK2
CLK3
PLL
Multiplier
CLK4
CLK5
CLK6
Crystal
Buffer/
Crystal
Oscillator
GND
CLK7
CLK8
10.0 to 27.0 MHz
crystal or clock input
X1
X2
External capacitors are
required with a crystal input.
MDS 552-01 C
Integrated Circuit Systems, Inc.
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1
525 Race Street, San Jose, CA 95126
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Revision 100104
tel (408) 297-1201
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www.icst.com
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