ICS557-01
PCI-E
XPRESS
C
LOCK
S
OURCE
Description
The ICS557-01 is a clock chip designed for use in
PCI-Express Cards as a clock source. It provides a pair
of differential outputs at 100 MHz in a small 8-pin SOIC
package.
Using ICS’ patented Phase-Locked Loop (PLL)
techniques, the device takes a 25 MHz crystal input
and produces HCSL (Host Clock Signal Level)
differential outputs at 100 MHz clock frequency. LVDS
signal levels can also be supported via an alternative
termination scheme.
Features
•
Supports PCI-Express
TM
HCSL Outputs
0.7 V current mode differential pair
•
•
•
•
•
•
•
•
•
Supports LVDS Output Levels
Packaged in 8-pin SOIC
Available in Pb (lead) free package
Operating voltage of 3.3 V
Low power consumption
Input frequency of 25 MHz
Short term jitter 100 ps (peak-to-peak)
Output Enable via pin selection
Industrial temperature range available
Block Diagram
VDD
Phase Lock
Loop
X1
25 MHz
crystal /clock
X2
Clock
Buffer/
Crystal
Oscillator
CLK
CLK
Crystal Tuning Capacitors
GND
OE
R
R
(IREF)
MDS 557-01 F
I n t e gra te d C i r c u i t S y s t e m s
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1
525 Race Stre et, San Jo se, CA 9 5126
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Revision 011606
te l (40 8) 2 97-12 01
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w w w. i c st . c o m