ICS601-25
L
OW
P
HASE
N
OISE
1
TO
5 C
LOCK
M
ULTIPLIER
DC Electrical Characteristics
(continued)
Parameter
Input High Voltage
Input Low Voltage
Output High Voltage, CMOS
level
Output High Voltage
Output Low Voltage
Operating Supply Current
Short Circuit Current
Input Capacitance
Output Impedance
On Chip Pull-up Resistor
On Chip Pull-down Resistor
Z
OUT
R
PU
R
PD
S2, S1, S0, PD
pins
S3 pin
Symbol
V
IH
V
IL
V
OH
V
OH
V
OL
IDD
I
OS
Conditions
Min.
2
Typ.
Max.
VDD
0.8
Units
V
V
V
V
I
OH
= -4 mA
I
OL
= -12 mA
I
OL
= 12 mA
No load, 125 MHz
Each output
Select pins
VDD-0.4
2.4
0.4
45
± 40
± 60
5
20
510
240
60
V
mA
mA
pF
Ω
kΩ
kΩ
AC Electrical Characteristics
VDD = 3.3V ±10%
, Ambient Temperature -40 to +85° C
Parameter
Input Frequency
Output Frequency
Output Rise Time
Output Fall Time
Output Clock Duty Cycle
Maximum Absolute jitter, short
term, 125 MHz
Maximum jitter, one sigma, 125
MHz (x5)
Phase Noise, relative to carrier,
125 MHz (x5)
Phase Noise, relative to carrier,
125 MHz (x5)
Phase Noise, relative to carrier,
125 MHz (x5)
Phase Noise, relative to carrier,
125 MHz (x5)
Output to Output Skew
Note 1: Measured with 15 pF load
t
OR
t
OF
At 3.3V
0.8 to 2.0 V, Note 1
0.8 to 2.0 V, Note 1
At VDD/2, Note 1
Note 1
Note 1
100 Hz offset
1 kHz
10 kHz offset
100 kHz offset
25M in, 125M out,
Note 1
-90
-115
-118
-115
45
50
±50
18
-95
-120
-123
-120
250
Symbol
Conditions
Min.
10
Typ.
Max. Units
27
156
1.5
1.5
55
±75
25
MHz
MHz
ns
ns
%
ps
ps
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
ps
MDS 601-25 C
In te grated Circuit Systems
●
4
525 Ra ce Street, San Jose, CA 9512 6
●
Revision 071505
tel (4 08) 297-1 201
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ICS [ INTEGRATED CIRCUIT SYSTEMS ]
