Integrated
Circuit
Systems, Inc.
ICS81006
VCXO-
TO
-6 LVCMOS O
UTPUTS
F
EATURES
•
Six LVCMOS/LVTTL outputs, 20Ω nominal
output impedance
•
Output Q5 can be selected for ÷1 or ÷2 frequency relative
to the crystal frequency
•
Output frequency range: 12MHz to 40MHz
•
Crystal pull range: ± 90ppm (typical)
•
Synchronous output enable places outputs in High-Z state
•
On-chip filter on VIN to suppress noise modulation of VCXO
•
V
DD
/V
DDO
combinations
3.3V/3.3V
3.3V/2.5V
3.3V/1.8V
2.5V/2.5V
2.5V/1.8V
•
4mm x 4mm 20 Lead VFQFN package is ideal for space
constrained designs
•
0°C to 70°C ambient operating temperature
•
Available in both standard and lead-free RoHS compliant
packages
G
ENERAL
D
ESCRIPTION
The ICS81006 is a high performance, low
jitter/low phase noise VCXO and is a
HiPerClockS™
member of the HiPerClockS™ family of high
performance clock solutions from ICS. The
ICS81006 works in conjunction with a
pullable crystal to generate an output clock over the
range of 12MHz - 40MHz and has 6 LVCMOS outputs,
effectively integrating a fanout buffer function.
IC
S
The frequency of the VCXO is adjusted by the VC control
voltage input. The output range is ±100ppm around the
nominal crystal frequency. The VC control voltage range
is 0 - V
DD
. The device is packaged in a small 4mm x 4mm
VFQFN package and is ideal for use on space
constrained boards typically encountered in ADSL/
VDSL applications.
B
LOCK
D
IAGRAM
OE0
(Pullup)
P
IN
A
SSIGNMENT
GND
V
DDO
OE0
SYNC
Q0
Q0
VC
LP Filter
XTAL_IN
XTAL_OUT
1
2
3
4
5
20 19 18 17 16
15
14
13
12
6
OE1
Q1
GND
Q2
V
DDO
Q3
GND
Q1
XTAL_IN
V
DD
VC
VCXO
Q2
XTAL_OUT
Q3
DIV_SEL_Q5
7
GND
8
Q5
9
V
DDO
11
10
Q4
ICS81006
Q4
20-Lead VFQFN
4mm x 4mm x 0.95 package body
K Package
Top View
0: ÷1
1: ÷2
DIV_SEL_Q5
(Pulldown)
Q5
OE1
(Pullup)
SYNC
www.icst.com/products/hiperclocks.html
1
REV. A JANUARY 4, 2006
81006AK
ICS [ INTEGRATED CIRCUIT SYSTEMS ]
