Integrated
Circuit
Systems, Inc.
ICS83026I
L
OW
S
KEW
, 1-
TO
-2
D
IFFERENTIAL
-
TO
-LVCMOS/LVTTL F
ANOUT
B
UFFER
F
EATURES
•
2 LVCMOS / LVTTL outputs
•
Differential CLK, nCLK input pair
•
CLK, nCLK pair can accept the following differential
input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL
•
Output frequency: 350MHz (typical)
•
Output skew: 20ps (maximum)
•
Part-to-part skew: 600ps (maximum)
•
Small 8 lead SOIC package saves board space
•
3.3V operating supply
•
-40°C to 85°C ambient operating temperature
•
Lead-Free package available
•
Pin-to-pin compatible with MC100EPT26
G
ENERAL
D
ESCRIPTION
The ICS83026I is a low skew, 1-to-2 Differ-
ential-to-LVCMOS/LVTTL Fanout Buffer and a
HiPerClockS™
member of the HiPerClockS™ family of High
Perfor mance Clock Solutions from ICS.The
differential input can accept most differential sig-
nal types (LVDS, LVHSTL, LVPECL, SSTL, and HCSL) and
translate to two single-ended LVCMOS/LVTTL outputs with a
maximum output skew of 20ps. The small 8-lead SOIC foot-
print makes this device ideal for use in applications with lim-
ited board space.
ICS
B
LOCK
D
IAGRAM
Q0
CLK
nCLK
Q1
P
IN
A
SSIGNMENT
nc
CLK
nCLK
nc
1
2
3
4
8
7
6
5
V
DD
Q0
Q1
GND
ICS83026I
8-Lead SOIC
3.8mm x 4.8mm, x 1.47mm package body
M Package
Top View
83026AMI
www.icst.com/products/hiperclocks.html
1
REV. B NOVEMBER 9, 2004