Integrated
Circuit
Systems, Inc.
ICS8302
L
OW
S
KEW
, 1-
TO
-2
LVCMOS / LVTTL F
ANOUT
B
UFFER
4.6V
-0.5V to V
DD
+ 0.5 V
-0.5V to V
DDO
+ 0.5V
112.7°C/W (0 lfpm)
-65°C to 150°C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional
operation of product at these conditions or any conditions be-
yond those listed in the
DC Characteristics
or
AC Character-
istics
is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
A
BSOLUTE
M
AXIMUM
R
ATINGS
Supply Voltage, V
DD
Inputs, V
I
Outputs, V
O
Package Thermal Impedance,
θ
JA
Storage Temperature, T
STG
T
ABLE
3A. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
DD
= V
DDO
= 3.3V±5%, T
A
= 0°C
TO
70°C
Symbol
V
DD
V
DDO
I
DD
I
DDO
Parameter
Core Supply Voltage
Output Power Supply Voltage
Power Supply Current
Output Supply Current
Test Conditions
Minimum
3.135
3.135
Typical
3.3
3.3
Maximum
3.465
3.465
13
4
Units
V
V
mA
mA
T
ABLE
3B. LVCMOS / LVTTL DC C
HARACTERISTICS
,
V
DD
= V
DDO
= 3.3V±5%, T
A
= 0°C
TO
70°C
Symbol
V
IH
V
IL
I
IH
I
IL
V
OH
V
OL
Parameter
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
Output High Voltage
Output Low Voltage
CLK
CLK
V
DD
= V
IN
= 3.465V
V
DD
= 3.465V, V
IN
= 0V
50
Ω
to V
DDO
/2
I
OH
= -100µA
50
Ω
to V
DDO
/2
I
OL
= 100µA
-5
2.6
2.9
0.5
0.2
Test Conditions
Minimum
2
-0.3
Typical
Maximum
V
DD
+ 0.3
1.3
150
Units
V
V
µA
µA
V
V
V
V
T
ABLE
4A. AC C
HARACTERISTICS
,
V
DD
= V
DDO
= 3.3V±5%, T
A
= 0°C
TO
70°C
Symbol Parameter
f
MAX
tp
LH
Output Frequency
Propagation Delay, Low-to-High; NOTE 1
Output Skew; NOTE 2, 4
Par t-to-Par t Skew; NOTE 3, 4
Output Rise Time
Output Fall Time
Output Duty Cycle
20% to 80%
20% to 80%
IJ 133MHz
133MHz < ƒ
≤
200MHz
300
300
45
40
IJ 200MHz
1.9
2.35
25
250
Test Conditions
Minimum
Typical
Maximum
200
2.8
85
800
800
800
55
60
Units
MHz
ns
ps
ps
ps
ps
%
%
t
sk(o)
t
sk(pp)
t
R
t
F
odc
Parameters measured at f
MAX
unless otherwise noted.
NOTE 1: Measured from V
DD
/2 of the input to V
DDO
/2 of the output.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at V
DDO
/2.
NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltages and with equal load
conditions. Using the same type of inputs on each device, the outputs are measured at V
DDO
/2.
NOTE 4: This parameter is defined in accordance with JEDEC Standard 65.
8302AM
www.icst.com/products/hiperclocks.html
3
REV. C JUNE 15, 2004
ICS [ INTEGRATED CIRCUIT SYSTEMS ]
