Integrated
Circuit
Systems, Inc.
ICS83058I
8:1, S
INGLE
-E
NDED
M
ULTIPLEXER
T
ABLE
5B. AC C
HARACTERISTICS
,
V
DD
= 3.3V ± 5%, V
DDO
= 2.5V ± 5%, T
A
= -40°C
TO
85°C
Symbol Parameter
f
MAX
tp
LH
tp
HL
t
sk(i)
t
sk(pp)
t
R
/ t
F
odc
Output Frequency
Propagation Delay, Low to High; NOTE 1
Propagation Delay, High to Low; NOTE 1
Input Skew; NOTE 2
Par t-to-Par t Skew; NOTE 2, 3
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
50
45
2.5
2.6
2.8
2.8
45
Test Conditions
Minimum
Typical
Maximum
250
3.1
3. 0
150
400
500
55
Units
MHz
ns
ns
ps
ps
ps
%
dB
@ 100MHz
45
MUX
ISOL
MUX Isolation
NOTE 1: Measured from V
DD
/2 of the input to V
DDO
/2 of the output.
NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 3: Defined as skew between outputs on different devices operating a the same supply voltages and
with equal load conditions. Using the same type of input on each device, the output is measured at V
DDO
/2.
T
ABLE
5C. AC C
HARACTERISTICS
,
V
DD
= 3.3V ± 5%, V
DDO
= 1.8V ± 5%, T
A
= -40°C
TO
85°C
Symbol Parameter
f
MAX
tp
LH
tp
HL
t
sk(i)
t
sk(pp)
t
R
/ t
F
o dc
Output Frequency
Propagation Delay, Low to High; NOTE 1
Propagation Delay, High to Low; NOTE 1
Input Skew; NOTE 2
Par t-to-Par t Skew; NOTE 2, 3
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
100
45
2.7
2.8
3.2
3.3
50
Test Conditions
Minimum
Typical
Maximum
250
3. 8
3.8
150
475
700
55
Units
MHz
ns
ns
ps
ps
ps
%
dB
@ 100MHz
45
MUX
ISOL
MUX Isolation
NOTE 1: Measured from V
DD
/2 of the input to V
DDO
/2 of the output.
NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 3: Defined as skew between outputs on different devices operating a the same supply voltages and
with equal load conditions. Using the same type of input on each device, the output is measured at V
DDO
/2.
83058AGI
www.icst.com/products/hiperclocks.html
REV. A SEPTEMBER 27, 2005
5
ICS [ INTEGRATED CIRCUIT SYSTEMS ]
