Integrated
Circuit
Systems, Inc.
ICS8312
L
OW
S
KEW
, 1-
TO
-12
LVCMOS / LVTTL F
ANOUT
B
UFFER
F
EATURES
•
12 LVCMOS / LVTTL outputs
•
LVCMOS / LVTTL clock input
•
Maximum output frequency: 250MHz
•
Output skew: 150ps (maximum)
•
Operating supply modes:
Core/Output
3.3V/3.3V,
2.5V/2.5V,
1.8V/1.8V,
3.3V/2.5V,
3.3V/1.8V,
2.5V/1.8V
•
0°C to 85°C ambient operating temperature
•
Lead-Free package available
•
Industrial temperature information available upon request
G
ENERAL
D
ESCRIPTION
The ICS8312 is a low skew, 1-to-12 LVCMOS /
LVTTL Fanout Buffer and a member of the
HiPerClockS™
HiPerClockS™family of High Performance Clock
Solutions from ICS. The ICS8312 single ended
clock input accepts LVCMOS or LVTTL input lev-
els. The low impedance LVCMOS outputs are designed to
drive 50Ω series or parallel terminated transmission lines. The
effective fanout can be increased from 12 to 24 by utilizing
the ability of the outputs to drive two series terminated lines.
ICS
The ICS8312 is characterized at full 3.3V, 2.5V, and 1.8V,
mixed 3.3V/2.5V, 3.3V/1.8V and 2.5V/1.8V output operating
supply modes. Guaranteed output and part-to-part skew char-
acteristics along with the 1.8V output capabilities makes the
ICS8312 ideal for high performance, single ended applica-
tions that also require a limited output voltage.
B
LOCK
D
IAGRAM
P
IN
A
SSIGNMENT
GND
GND
V
DDO
V
DDO
Q0
Q1
Q2
Q3
CLK_EN
nD
Q
LE
12
GND
V
DD
Q0:Q11
CLK_EN
CLK
GND
OE
V
DD
GND
1
2
3
4
5
6
7
8
32 31 30 29 28 27 26 25
24
23
22
Q4
V
DDO
Q5
GND
Q6
V
DDO
Q7
GND
CLK
ICS8312
21
20
19
18
17
OE
9 10 11 12 13 14 15 16
Q11
V
DDO
Q10
GND
Q9
V
DDO
Q8
GND
32-Lead LQFP
7mm x 7mm x 1.4mm body package
Y Pacakge
Top View
8312AY
http://www.icst.com/products/hiperclocks.html
1
REV. C JUNE 14, 2004
ICS [ INTEGRATED CIRCUIT SYSTEMS ]
