Integrated
Circuit
Systems, Inc.
ICS84314
350MH
Z
, C
RYSTAL
-
TO
-3.3V/2.5V LVPECL
F
REQUENCY
S
YNTHESIZER W
/F
ANOUT
B
UFFER
F
EATURES
•
Fully integrated PLL
•
4 differential 3.3V or 2.5V LVPECL outputs
•
Selectable crystal oscillator interface
or LVCMOS TEST_CLK input
•
Output frequency range: 62.5MHz to 350MHz
•
VCO range: 250MHz to 700MHz
•
Parallel interface for programming counter
and output dividers during power-up
•
Serial 3 wire interface
•
Cycle-to-cycle jitter: 23ps (typical)
•
Output skew: 16ps (typical)
•
Output duty cycle: 49% < odc < 51%, fout
≤
125MHz
•
Full 3.3V or mixed 3.3V core, 2.5V operating supply
•
0°C to 85°C ambient operating temperature
•
Lead-Free package available
G
ENERAL
D
ESCRIPTION
The ICS84314 is a general purpose quad output
frequency synthesizer and a member of the
HiPerClockS™
HiPerClockS™ family of High Performance Clock
Solutions from ICS. When the device uses par-
allel loading, the M bits are programmable and
the output divider is hard-wired for divide by 2 thus providing
a frequency range of 125MHz to 350MHz. In serial program-
ming mode, the M bits are programmable and the output di-
vider can be set for either divide by 2 or divide by 4, providing
a frequency range of 62.5MHz to 350MHz. The low cycle-
cycle jitter and broad frequency range of the ICS84314 make
it an ideal clock generator for a variety of demanding applica-
tions which require high performance.
ICS
B
LOCK
D
IAGRAM
P
IN
A
SSIGNMENT
VCO_SEL
nP_LOAD
XTAL2
XTAL1
M3
M2
M1
M0
VCO_SEL
32 31 30 29 28 27 26 25
XTAL_SEL
M4
TEST_CLK
XTAL1
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16
Q0
nQ0
Q1
nQ1
Q2
nQ2
Q3
nQ3
24
23
22
TEST_CLK
XTAL_SEL
V
CCA
S_LOAD
S_DATA
S_CLOCK
MR
V
CCO
0
M5
M6
OSC
XTAL2
1
÷
16
M7
M8
V
EE
V
CC
ICS84314
21
20
19
18
17
PLL
PHASE DETECTOR
MR
V
CCO
Q0
nQ0
0
1
VCO
÷
M
÷
2
S_LOAD
S_DATA
S_CLOCK
nP_LOAD
M0:M8
÷2
÷4
Q1
nQ1
Q2
nQ2
Q3
nQ3
CONFIGURATION
INTERFACE
LOGIC
32-Lead LQFP
7mm x 7mm x 1.4mm package body
Y Package
Top View
84314AY
www.icst.com/products/hiperclocks.html
1
REV. C JANUARY 27, 2005
ICS [ INTEGRATED CIRCUIT SYSTEMS ]
