Integrated
Circuit
Systems, Inc.
T
ERMINATION
LVPECL O
UTPUTS
ICS84320-01
780MH
Z
, C
RYSTAL
-
TO
-3.3V D
IFFERENTIAL
LVPECL F
REQUENCY
S
YNTHESIZER
drive 50Ω transmission lines. Matched impedance techniques
should be used to maximize operating frequency and minimize
signal distortion.
Figures 4A and 4B
show two different layouts
which are recommended only as guidelines. Other suitable clock
layouts may exist and it would be recommended that the board
designers simulate to guarantee compatibility across all printed
circuit and clock component process variations.
FOR
The clock layout topology shown below is a typical termina-
tion for LVPECL outputs. The two different layouts mentioned
are recommended only as guidelines.
FOUT and nFOUT are low impedance follower outputs that
generate ECL/LVPECL compatible outputs. Therefore, terminat-
ing resistors (DC current path to ground) or current sources
must be used for functionality. These outputs are designed to
Z
o
= 50Ω
3.3V
125Ω
125Ω
FOUT
FIN
Z
o
= 50Ω
Z
o
= 50Ω
FOUT
50Ω
1
RTT =
Z
((V
OH
+ V
OL
) / (V
CC
– 2)) – 2
o
50Ω
V
CC
- 2V
RTT
FIN
Z
o
= 50Ω
84Ω
84Ω
F
IGURE
4A. LVPECL O
UTPUT
T
ERMINATION
F
IGURE
4B. LVPECL O
UTPUT
T
ERMINATION
L
AYOUT
G
UIDELINE
The schematic of the ICS84320-01 layout example used in
this layout guideline is shown in
Figure 5A.
The ICS84320-01
recommended PCB board layout for this example is shown in
Figure 5B.
This layout example is used as a general guideline.
The layout in the actual system will depend on the selected
component types, the density of the components, the density
of the traces, and the stack up of the P.C. board.
C1
X1
C2
U1
32
31
30
29
28
27
26
25
9
10
11
12
VCC
13
FOUT
14
FOUTN
15
16
ICS84320-01
TEST
VCC
FOUT1
nFOUT1
VCCO
FOUT0
nFOUT0
VEE
1
2
3
4
5
6
7
8
M4
M3
M2
M1
M0
VCO_SEL
nP_LOAD
XTAL1
VCC
24
23
22
21
20
19
18
17
R7
24
M5
M6
M7
M8
N0
N1
nc
VEE
XTAL2
T_CLK
nXTAL_SEL
VCCA
S_LOAD
S_DATA
S_CLOCK
MR
REF_IN
XTAL_SEL
VCCA
S_LOAD
S_DATA
S_CLOCK
C11
0.01u
C16
10u
VCC
VCC
R1
125
R3
125
Zo = 50 Ohm
C14
0.1u
TL1
C15
0.1u
Zo = 50 Ohm
IN+
+
IN-
TL2
-
R2
84
R4
84
F
IGURE
5A. S
CHEMATIC
84320AY-01
OF
R
ECOMMENDED
L
AYOUT
REV. A AUGUST 24, 2004
www.icst.com/products/hiperclocks.html
10
ICS [ INTEGRATED CIRCUIT SYSTEMS ]
