Integrated
Circuit
Systems, Inc.
ICS8432-101
700MH
Z
,
D
IFFERENTIAL
-
TO
-3.3V LVPECL F
REQUENCY
S
YNTHESIZER
A
PPLICATION
I
NFORMATION
S
TORAGE
A
REA
N
ETWORKS
A variety of technologies are used for interconnection of the
elements within a SAN. The tables below list the common appli-
cation frequencies as well as the ICS8432-101 configurations
used to generate the appropriate frequency.
Table 7. Common SANs Application Frequencies
Interconnect Technology
Gigabit Ethernet
Fibre Channel
Infiniband
Clock Rate
1.25 GHz
FC1 1.0625 GHz
FC2 2.1250 GHz
2.5 GHz
Reference Frequency to SERDES
(MHz)
125, 250, 156.25
106.25, 53.125, 132.8125
125, 250
Crystal Frequency
(MHz)
25, 19.53125
16.6015625, 25
25
Table 8. Configuration Details for SANs Applications
Interconnect
Technology
CLK, nCLK Input
(MHz)
25
25
Gigabit Ethernet
25
19.53125
25
Fiber Channel 1
25
Fiber Channel 2
Infiniband
25
250
0
0
0
0
1
0
1
0
0
0
1
16.6015625
25
106.25
132.8125
125
0
0
0
0
0
0
0
0
0
0
1
0
1
0
1
0
0
0
0
0
1
0
0
0
1
0
0
1
1
1
0
0
0
156.25
156.25
53.125
0
0
0
0
0
0
0
0
0
0
1
0
1
0
1
1
0
0
0
0
0
0
0
0
1
0
1
1
1
1
0
0
1
ICS8432-101
Output Frequency
to SERDES
(MHz)
125
250
ICS8432-101
M & N Settings
M8 M7 M6 M5 M4 M3 M2
0
0
0
0
0
0
0
0
1
1
0
0
1
1
M1 M0
0
0
0
0
N1
1
0
N0
0
1
P
OWER
S
UPPLY
F
ILTERING
T
ECHNIQUES
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. The ICS8432-101 provides
separate power supplies to isolate any high switching
noise from the outputs to the internal PLL. V
CC
, V
CCA
, and V
CCO
should be individually connected to the power supply
plane through vias, and bypass capacitors should be
used for each pin. To achieve optimum jitter performance,
power supply isolation is required.
Figure 2
illustrates how
a 10Ω resistor along with a 10μF and a .01μF bypass
capacitor should be connected to each V
CCA
pin.
8432DY-101
3.3V
V
CC
.01μF
V
CCA
.01μF
10
μF
10Ω
F
IGURE
2. P
OWER
S
UPPLY
F
ILTERING
REV. B JUNE 1, 2005
www.icst.com/products/hiperclocks.html
8
ICS [ INTEGRATED CIRCUIT SYSTEMS ]
