Integrated
Circuit
Systems, Inc.
ICS843021
F
EMTO
C
LOCKS
™ C
RYSTAL
-
TO
-
3.3V LVPECL C
LOCK
G
ENERATOR
A
PPLICATION
I
NFORMATION
P
OWER
S
UPPLY
F
ILTERING
T
ECHNIQUES
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. The ICS843021 provides sepa-
rate power supplies to isolate any high switching
noise from the outputs to the internal PLL. V
CC
, and V
CCA
should
be individually connected to the power supply
plane through vias, and bypass capacitors should be
used for each pin. To achieve optimum jitter performance,
power supply isolation is required.
Figure 1
illustrates how
a 10Ω resistor along with a 10μF and a .01μF bypass
capacitor should be connected to each V
CCA
pin.
3.3V
V
CC
.01μF
10Ω
V
CCA
.01μF
10μF
F
IGURE
1. P
OWER
S
UPPLY
F
ILTERING
C
RYSTAL
I
NPUT
I
NTERFACE
The ICS843021 has been characterized with 18pF parallel
resonant crystals. The capacitor values, C1 and C2, shown in
Figure 2
below were determined using a 25MHz, 18pF parallel
resonant crystal and were chosen to minimize the ppm error.
The optimum C1 and C2 values can be slightly adjusted for
different board layouts.
XTAL_OUT
C1
33p
X1
18pF Parallel Crystal
XTAL_IN
C2
27p
Figure 2. C
RYSTAL
I
NPU
t I
NTERFACE
843021AG
www.icst.com/products/hiperclocks.html
6
REV. C MARCH 31, 2005