Integrated
Circuit
Systems, Inc.
ICS85311
Low Skew, 1-to-2
Differential-to-2.5V/3.3V ECL/LVPECL Fanout Buffer
F
EATURES
•
2 differential 2.5V/3.3V LVPECL / ECL outputs
•
1 CLK, nCLK input pair
•
CLK, nCLK pair can accept the following differential input
levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL
•
Maximum output frequency up to 1GHz
•
Translates any single ended input signal to 3.3V LVPECL
levels with resistor bias on nCLK input
•
Output skew: 15ps (maximum)
•
Part-to-part skew: 100ps (maximum)
•
Propagation delay: 1.4ns (maximum)
•
LVPECL mode operating voltage supply range:
V
CC
= 2.375V to 3.465V, V
EE
= 0V
•
ECL mode operating voltage supply range:
V
CC
= 0V, V
EE
= -2.375V to -3.465V
•
0°C to 70°C ambient operating temperature
•
Industrial temperature information available upon request
G
ENERAL
D
ESCRIPTION
The ICS85311 is a low skew, high perfor-
mance 1-to-2 Differential-to-2.5V/3.3V ECL/
HiPerClockS™
LVPECL Fanout Buffer and a member of the
HiPerClockS™ family of High Performance
Clock Solutions from ICS. The CLK, nCLK pair
can accept most standard differential input levels.T h e
ICS85311 is characterized to operate from either a 2.5V
or a 3.3V power supply. Guaranteed output and part-
to-part skew characteristics make the ICS85311 ideal
for those clock distribution applications demanding well
defined performance and repeatability.
,&6
B
LOCK
D
IAGRAM
CLK
nCLK
Q0
nQ0
Q1
nQ1
P
IN
A
SSIGNMENT
Q0
nQ0
Q1
nQ1
1
2
3
4
8
7
6
5
Vcc
CLK
nCLK
V
EE
ICS85311
8-Lead SOIC
3.90mm x 4.90mm x 1.37mm package body
M Package
Top View
ICS85311AM
www.icst.com/products/hiperclocks.html
1
REV. A JUNE 29, 2001
ICS [ INTEGRATED CIRCUIT SYSTEMS ]
