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ICS9248BF-55 参数 Datasheet PDF下载

ICS9248BF-55图片预览
型号: ICS9248BF-55
PDF下载: 下载PDF文件 查看货源
内容描述: 奔腾/专业版/ IITM系统时钟芯片 [Pentium/Pro/IITM System Clock Chip]
分类和应用: 时钟
文件页数/大小: 10 页 / 271 K
品牌: ICS [ INTEGRATED CIRCUIT SYSTEMS ]
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Integrated
Circuit
Systems, Inc.
ICS9248-55
Pentium/Pro/II
TM
System Clock Chip
General Description
The
ICS9248-55
is a Clock Synthesizer chip for Pentium and
PentiumPro CPU based Desktop/Notebook systems that will
provide all necessary clock timing.
Features include four CPU and eight PCI clocks. Three
reference outputs are available equal to the crystal frequency.
Additionally, the device meets the Pentium power-up
stabilization requirement, assuring that CPU and PCI clocks
are stable within 2ms after power-up.
PD# pin enables low power mode by stopping crystal OSC
and PLL stages. Other power management features include
CPU_STOP#, which stops CPU (0:3) clocks, and PCI_STOP#,
which stops PCICLK (0:6) clocks.
High drive CPUCLK outputs typically provide greater than 1
V/ns slew rate into 20pF loads. PCICLK outputs typically
provide better than 1V/ns slew rate into 30pF loads while
maintaining 50±5% duty cycle. The REF clock outputs typically
provide better than 0.5V/ns slew rates.
The
ICS9248-55
accepts a 14.318MHz reference crystal or
clock as its input and runs on a 3.3V core supply.
Features
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Generates system clocks for CPU, IOAPIC, PCI, plus
14.314 MHz REF (0:2), USB, and Super I/O
Supports single or dual processor systems
Supports Spread Spectrum modulation for CPU & PCI
clocks, down spread -0.5%
Skew from CPU (earlier) to PCI clock (rising edges for
100/33.3MHz) 1.5 to 4ns
Two fixed outputs at 48MHz.
Separate 2.5V and 3.3V supply pins
2.5V or 3.3V output: CPU, IOAPIC
3.3V outputs: PCI, REF, 48MHz
No power supply sequence requirements
Uses external 14.318MHz crystal, no external load cap
required for C
L
=18pF crystal
48 pin 300 mil SSOP
Block Diagram
Pin Configuration
48-Pin SSOP
Power Groups
VDD = Supply for PLL core
VDD1 = REF (0:2), X1, X2
VDD2 = PCICLK_F, PCICLK (0:6)
VDD3 = 48MHz0, 48MHz1
VDDL1 = IOAPIC (0:1)
VDDL2 = CPUCLK (0:3)
9248-55 Rev B 12/04/98
Ground Groups
* Internal Pull-down Resistor of
240K to GND. on indicated inputs
GND = Ground for PLL core
GND1 = REF (0:2), X1, X2
GND2 = PCICLK_F, PCICLK (0:6)
GND3 = 48MHz0, 48MHz1
GNDL1 = IOAPIC (0:1)
GNDL2 = CPUCLK (0:3)
Pentium is a trademark on Intel Corporation.
ICS reserves the right to make changes in the device data identified in
this publication without further notice. ICS advises its customers to
obtain the latest version of all device data to verify that any
information being relied upon by the customer is current and accurate.