MK1491-14
OPTi ACPI Firestar Clock Source
Electrical Specifications
Parameter
Supply voltage, VDD
Inputs and Clock Outputs
Ambient Operating Temperature
Soldering Temperature
Storage temperature
Operating Voltage
Operating Voltage
Input High Voltage, VIH
Input Low Voltage, VIL
Output High Voltage, VOH
Output Low Voltage, VOL
Output High Voltage, VOH
Operating Supply Current, IDD
Power Down mode Supply Current
Short Circuit Current
Short Circuit Current
Input Capacitance
Conditions
Referenced to GND
Referenced to GND
Max of 10 seconds
-65
VDD
VDD HOST1-4, HOST5-7
2
0.8
IOH=-8mA
IOL=8mA
IOH=-8mA
No Load, 66.6MHz
Each output
VDD HOST = 2.5V
2.4
0.4
VDD-0.4
48
3
±50
±25
7
14.31818
1.5
2.5
1.5
2.5
55
250
750
500
3.3
2.5/3.3
Minimum
Typical
Maximum
7
VDD+0.5
70
260
150
3.6
VDD
Units
V
V
°C
°C
°C
V
V
V
V
V
V
V
mA
µΑ
mA
mA
pF
MHz
ns
ns
ns
ns
%
ps
ps
ps
ns
ns
ps
ps
dB
ms
ms
ABSOLUTE MAXIMUM RATINGS (note 1)
-0.5
0
DC CHARACTERISTICS (VDD = 3.3V or 2.5V unless noted)
AC CHARACTERISTICS (VDD = 3.3V or 2.5V unless noted)
Input Frequency
Output Clock Rise Time
0.8 to 2.0V
VDD HOST = 2.5V
HOST Output Clock Rise Time
Output Clock Fall Time
2.0 to 0.8V
VDD HOST = 2.5V
HOST Output Clock Fall Time
Output Clock Duty Cycle, all MHz clocks
At 1.5V
HOST1-4 Output to Output Skew
Rising edges at 1.5V
With proper HSKEW setting
Skew of HOST 5,7 with respect to HOST 1-4
PCI Output to Output Skew
Rising edges at 1.5V
Lead of EHOST6 outputs with respect to PCI
Rising edges at 1.5V
Lead of EHOST6 with respect to HOST1-5, 7
Rising edges at 1.5V
Cycle to Cycle Jitter, CPU Clocks
Absolute Clock Period Jitter, Other MHz Clocks,
except 14.318 MHz
EMI reduction, peaks of 5th - 19th odd harmonics
66.6 MHz clocks, LE=1
Power up time, STOP# going high to all clocks stable
Power on time, applied VDD to all clocks stable
Note 1.
45
49 to 51
1.9
3.9
1000
-500
6
8
12
500
11
20
25
Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged exposure to levels
above the operating limits but below the Absolute Maximums may affect device reliability.
MDS 1491-14 B
3
Revision 061801
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA •95126 • (408)295-9800tel • www.icst.com
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